Microprogramming and microarchitecture: proceedings of the 23rd annual workshop and symposium
Gespeichert in:
Format: | Tagungsbericht Buch |
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Sprache: | Undetermined |
Veröffentlicht: |
Los Alamitos u.a.
IEEE Computer Soc. Pr.
1990
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Schlagworte: | |
Online-Zugang: | Inhaltsverzeichnis |
Beschreibung: | Literaturangaben |
Beschreibung: | X, 299 S. graph. Darst. |
Internformat
MARC
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245 | 1 | 0 | |a Microprogramming and microarchitecture |b proceedings of the 23rd annual workshop and symposium |c MICRO 23, Orlando, Fla., November 27 - 29, 1990 |
264 | 1 | |a Los Alamitos u.a. |b IEEE Computer Soc. Pr. |c 1990 | |
300 | |a X, 299 S. |b graph. Darst. | ||
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650 | 0 | 7 | |a Mikroprogrammierung |0 (DE-588)4039231-4 |2 gnd |9 rswk-swf |
655 | 7 | |0 (DE-588)1071861417 |a Konferenzschrift |y 1990 |z Orlando Fla. |2 gnd-content | |
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Datensatz im Suchindex
_version_ | 1820868138185523200 |
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adam_text |
Table
of Contents
Foreword and Acknowledgements
.
v
Program Committee
.
^
List of Referees
.
vii
Introductory Remarks and Comments
Introduction to the Authors of MICRO
23
Keynote Address: Instruction Sets and Their Implementations
.1
MJ. Ftynn, Stanford University
Sessioni
VLJW-in-the-Large:
A Model for Fine Grain Parallelism Exploitation on
Distributed Memory Multiprocessors
.7
M. Danelutto and M.
Wanneschi
A Software Pipelining Based VLIW Architecture and Optimizing Compiler
.17
B.
Su,
J.
Wang, Y. Wu,
Z. Tang,
and W. Zhao
A Fine-Grained MM) Architecture Based Upon Register Channels
.28
R. Gupta
Hardware Implementation of General Multi-Way Jump Mechanism
.,38
S.-M. Moon, SJ). Carson, and AX. Agrawala
Session
2
Software Pipelining: A Comparison and Improvement
.46
RB. Jones and VJH. Allan
Using a Lookahead Window in a Compaction-Based Parallelizing Compiler
.57
Ţ.
Nakatani and K. Ebcioglu
Realistic Scheduling: Compaction for Pipelined Architectures
.69
A.
Nicolau
and R. Potasman
Session
3
An Evaluation System for Application Specific Architectures
.80
A.
DeGloria
and P.
Foraboschi
A Framework for High-Speed Controller Design
.90
J
M.Mulder,
R
J.
Portier,
and A. Srivastava
Session
4
High-Level Microprogramming: An Optimizing
С
Compiler for a
Processing Element of a CAD Accelerator
.97
P. Kenyon, P. Agrawal, and S. Seth
Post-Compaction Register Assignment in a Retargetable Compiler
.107
P. Sweany and
S. Beaty
Motivation and Framework for Using Genetic Algorithms
for Microcode Compaction
.117
5.
Beaty, D.
Whitley, and G. Johnson
VUl
Session 5
Ideograph/Ideogram: Framework/Hardware for Eager Evaluation
.125
S.S.
Wang and AX. Uht
An Instruction Reorderer for Pipelined Computers
.135
J.-J. Shieh and
СЛ.
Papachristou
Optimization on Instruction Reorganization
.143
F. Lai, H.-C. Lee, and C.-L. Lee
Panel Session
VLIW Compiling versus Smart Run-Time Hardware. Where to Draw the Line?
Panel Organizer. J. Fisher, HP Labs
Panelists: K. Ebcioglu, A.
Nicolau,
and Y.
Patt
Session
6
Automatic Synthesis of a Dual-PLA Controller with a Counter
.149
D. Binger and
D.W. Knapp
Interconnection Synthesis with Geometric Constraints
.158
F. Brewer, B. Pangrle, and A. Seawright
An Application of L-Systems to Local Microcode Synthesis
.166
F. Mavaddat, M. Mahmood, andMHM. Cheng
SYMCAD: Synthesis of Microprogrammed Control for Automated
VLSI Design
.176
BL. Priyadarshan, M. Balakrishnan, A. Kumar, and G.S. Visweswaran
Session
7
The Selection of Optimal Cache Lines for Microprocessor-Based Controllers
.183
T.-L. Sheu, Y.-B. Shieh, and W.
Un
Address Compression Through Base Register Caching
.193
A. Park and MX.
Förrens
A Memory Management Unit and Cache Controller for the MARS System
.200
F. Lai and C.-Y. Wu, and T.-M. Parng
An Evaluation of Functional Unit Lengths for Single-Chip Processors
.209
MX. Farrens and Alt. Pleszkun
A Multiple Floating Point Coprocessor Architecture
.216
L. Rauchwerger and PM.
Farmwald
Session
8
A Barrel Shift Microsystem for Parallel Processing
.223
R. Bakalash and Z. Xu
PRISM Architecture: Parallel and Pipeline Features
.230
B. Gocal
Topologies for the Parallel Backtracking Prolog Engine
.237
L.
Campanale,
M.
DeBlasi, A. Gentile, andF. Greco
IX
Session 9
A
High-Level
Microprogrammed Processors
.244
C.
Iseli and
E.
Sanchez
SMDSS -
A Structured Microcode Development and Simulation System
.252
D. Smati, J. Hwang, and
С
A. Papachristou
Session
10
On
nie
Testing of Microprogrammed Processors
.260
S. Hwang, R. Rajsuman, and YX. MaJaiya
A Weighted Technique for Programmable Logic Devices Minimization
.267
CM. Chang andHX.
Ázzam
Microprogramming Heritage of RISC Design
.275
L. Shih
A Survey On Bit Dimension Optimization Strategies of Microprograms
.281
ЅД.
Das and
АЯ.
Nayak
A Model of a Microprogrammed Functional-Oriented Computing Unit
.292
M. Alderighi and
G
JR.
Sechi
Author Index
.299 |
any_adam_object | 1 |
building | Verbundindex |
bvnumber | BV004838110 |
classification_rvk | SS 1990 |
classification_tum | DAT 200f DAT 155f |
ctrlnum | (OCoLC)630961413 (DE-599)BVBBV004838110 |
discipline | Informatik |
format | Conference Proceeding Book |
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spelling | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium MICRO 23, Orlando, Fla., November 27 - 29, 1990 Los Alamitos u.a. IEEE Computer Soc. Pr. 1990 X, 299 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturangaben Mikroarchitektur (DE-588)4139308-9 gnd rswk-swf Mikroprogrammierung (DE-588)4039231-4 gnd rswk-swf (DE-588)1071861417 Konferenzschrift 1990 Orlando Fla. gnd-content Mikroprogrammierung (DE-588)4039231-4 s DE-604 Mikroarchitektur (DE-588)4139308-9 s Workshop on Microprogramming and Microarchitecture 23 1990 Orlando, Fla. Sonstige (DE-588)5158761-0 oth Digitalisierung TU Muenchen application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=002978963&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium Mikroarchitektur (DE-588)4139308-9 gnd Mikroprogrammierung (DE-588)4039231-4 gnd |
subject_GND | (DE-588)4139308-9 (DE-588)4039231-4 (DE-588)1071861417 |
title | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium |
title_auth | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium |
title_exact_search | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium |
title_full | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium MICRO 23, Orlando, Fla., November 27 - 29, 1990 |
title_fullStr | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium MICRO 23, Orlando, Fla., November 27 - 29, 1990 |
title_full_unstemmed | Microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium MICRO 23, Orlando, Fla., November 27 - 29, 1990 |
title_short | Microprogramming and microarchitecture |
title_sort | microprogramming and microarchitecture proceedings of the 23rd annual workshop and symposium |
title_sub | proceedings of the 23rd annual workshop and symposium |
topic | Mikroarchitektur (DE-588)4139308-9 gnd Mikroprogrammierung (DE-588)4039231-4 gnd |
topic_facet | Mikroarchitektur Mikroprogrammierung Konferenzschrift 1990 Orlando Fla. |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=002978963&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
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