Computer logic, testing and verification:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Potomac, Md.
Computer Science Pr.
1980
|
| Schriftenreihe: | Digital system design series.
|
| Schlagworte: | |
| Beschreibung: | XX, 176 S. graph. Darst. |
| ISBN: | 0914894625 3540125825 |
Internformat
MARC
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| 245 | 1 | 0 | |a Computer logic, testing and verification |c J. Paul Roth |
| 264 | 1 | |a Potomac, Md. |b Computer Science Pr. |c 1980 | |
| 300 | |a XX, 176 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a Digital system design series. | |
| 650 | 4 | |a Circuits logiques | |
| 650 | 4 | |a Structure logique | |
| 650 | 4 | |a Logic circuits | |
| 650 | 4 | |a Logic design | |
| 650 | 0 | 7 | |a Datenverarbeitung |0 (DE-588)4011152-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Informatik |0 (DE-588)4026894-9 |2 gnd |9 rswk-swf |
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| 650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
| _version_ | 1804118012255535104 |
|---|---|
| any_adam_object | |
| author | Roth, John Paul |
| author_facet | Roth, John Paul |
| author_role | aut |
| author_sort | Roth, John Paul |
| author_variant | j p r jp jpr |
| building | Verbundindex |
| bvnumber | BV003665136 |
| callnumber-first | T - Technology |
| callnumber-label | TK7888 |
| callnumber-raw | TK7888.4 |
| callnumber-search | TK7888.4 |
| callnumber-sort | TK 47888.4 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 195 |
| ctrlnum | (OCoLC)5893252 (DE-599)BVBBV003665136 |
| dewey-full | 621.3819/5835 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3819/5835 |
| dewey-search | 621.3819/5835 |
| dewey-sort | 3621.3819 45835 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV003665136 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T16:03:32Z |
| institution | BVB |
| isbn | 0914894625 3540125825 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-002333758 |
| oclc_num | 5893252 |
| open_access_boolean | |
| owner | DE-384 DE-739 DE-20 DE-29T DE-188 |
| owner_facet | DE-384 DE-739 DE-20 DE-29T DE-188 |
| physical | XX, 176 S. graph. Darst. |
| publishDate | 1980 |
| publishDateSearch | 1980 |
| publishDateSort | 1980 |
| publisher | Computer Science Pr. |
| record_format | marc |
| series2 | Digital system design series. |
| spelling | Roth, John Paul Verfasser aut Computer logic, testing and verification J. Paul Roth Potomac, Md. Computer Science Pr. 1980 XX, 176 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Digital system design series. Circuits logiques Structure logique Logic circuits Logic design Datenverarbeitung (DE-588)4011152-0 gnd rswk-swf Informatik (DE-588)4026894-9 gnd rswk-swf Computer (DE-588)4070083-5 gnd rswk-swf Logik (DE-588)4036202-4 gnd rswk-swf Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Datenverarbeitung (DE-588)4011152-0 s Logik (DE-588)4036202-4 s DE-604 Computer (DE-588)4070083-5 s Logischer Entwurf (DE-588)4168051-0 s Informatik (DE-588)4026894-9 s 1\p DE-604 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Roth, John Paul Computer logic, testing and verification Circuits logiques Structure logique Logic circuits Logic design Datenverarbeitung (DE-588)4011152-0 gnd Informatik (DE-588)4026894-9 gnd Computer (DE-588)4070083-5 gnd Logik (DE-588)4036202-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| subject_GND | (DE-588)4011152-0 (DE-588)4026894-9 (DE-588)4070083-5 (DE-588)4036202-4 (DE-588)4168051-0 |
| title | Computer logic, testing and verification |
| title_auth | Computer logic, testing and verification |
| title_exact_search | Computer logic, testing and verification |
| title_full | Computer logic, testing and verification J. Paul Roth |
| title_fullStr | Computer logic, testing and verification J. Paul Roth |
| title_full_unstemmed | Computer logic, testing and verification J. Paul Roth |
| title_short | Computer logic, testing and verification |
| title_sort | computer logic testing and verification |
| topic | Circuits logiques Structure logique Logic circuits Logic design Datenverarbeitung (DE-588)4011152-0 gnd Informatik (DE-588)4026894-9 gnd Computer (DE-588)4070083-5 gnd Logik (DE-588)4036202-4 gnd Logischer Entwurf (DE-588)4168051-0 gnd |
| topic_facet | Circuits logiques Structure logique Logic circuits Logic design Datenverarbeitung Informatik Computer Logik Logischer Entwurf |
| work_keys_str_mv | AT rothjohnpaul computerlogictestingandverification |