Algorithms and techniques for VLSI layout synthesis:
Gespeichert in:
Format: | Buch |
---|---|
Sprache: | English |
Veröffentlicht: |
Boston [u.a.]
Kluwer Acad. Publ.
1989
|
Schriftenreihe: | The Kluwer international series in engineering and computer science
65 : VLSI, computer architecture and digital signal processing |
Schlagworte: | |
Beschreibung: | XII, 212 S. zahlr. graph. Darst. |
ISBN: | 0898383013 |
Internformat
MARC
LEADER | 00000nam a2200000 cb4500 | ||
---|---|---|---|
001 | BV003578079 | ||
003 | DE-604 | ||
005 | 20140613 | ||
007 | t | ||
008 | 900828s1989 d||| |||| 00||| engod | ||
020 | |a 0898383013 |9 0-89838-301-3 | ||
035 | |a (OCoLC)18557274 | ||
035 | |a (DE-599)BVBBV003578079 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91G |a DE-739 |a DE-898 |a DE-83 |a DE-11 | ||
050 | 0 | |a TK7874 | |
082 | 0 | |a 621.381/73 |2 19 | |
084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
084 | |a ELT 272f |2 stub | ||
245 | 1 | 0 | |a Algorithms and techniques for VLSI layout synthesis |c by Dwight Hill ... |
264 | 1 | |a Boston [u.a.] |b Kluwer Acad. Publ. |c 1989 | |
300 | |a XII, 212 S. |b zahlr. graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
490 | 1 | |a The Kluwer international series in engineering and computer science |v 65 : VLSI, computer architecture and digital signal processing | |
650 | 4 | |a Circuits intégrés | |
650 | 4 | |a Integrated circuit layout |x Computer-aided design | |
650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
650 | 0 | 7 | |a Geometrische Ordnung |0 (DE-588)4156719-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Datenstruktur |0 (DE-588)4011146-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Algorithmus |0 (DE-588)4001183-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Design |0 (DE-588)4011510-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 1 | |a Layout |g Mikroelektronik |0 (DE-588)4264372-7 |D s |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 1 | |5 DE-604 | |
689 | 2 | 0 | |a Geometrische Ordnung |0 (DE-588)4156719-5 |D s |
689 | 2 | |5 DE-604 | |
689 | 3 | 0 | |a Algorithmus |0 (DE-588)4001183-5 |D s |
689 | 3 | |5 DE-604 | |
689 | 4 | 0 | |a Design |0 (DE-588)4011510-0 |D s |
689 | 4 | |5 DE-604 | |
689 | 5 | 0 | |a Datenstruktur |0 (DE-588)4011146-5 |D s |
689 | 5 | |5 DE-604 | |
700 | 1 | |a Hill, Dwight D. |e Sonstige |0 (DE-588)142015199 |4 oth | |
830 | 0 | |a The Kluwer international series in engineering and computer science |v 65 : VLSI, computer architecture and digital signal processing |w (DE-604)BV023545171 |9 65 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-002277975 |
Datensatz im Suchindex
_version_ | 1804117928147156992 |
---|---|
any_adam_object | |
author_GND | (DE-588)142015199 |
building | Verbundindex |
bvnumber | BV003578079 |
callnumber-first | T - Technology |
callnumber-label | TK7874 |
callnumber-raw | TK7874 |
callnumber-search | TK7874 |
callnumber-sort | TK 47874 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ST 190 |
classification_tum | ELT 272f |
ctrlnum | (OCoLC)18557274 (DE-599)BVBBV003578079 |
dewey-full | 621.381/73 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.381/73 |
dewey-search | 621.381/73 |
dewey-sort | 3621.381 273 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>02419nam a2200613 cb4500</leader><controlfield tag="001">BV003578079</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20140613 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">900828s1989 d||| |||| 00||| engod</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0898383013</subfield><subfield code="9">0-89838-301-3</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)18557274</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV003578079</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-898</subfield><subfield code="a">DE-83</subfield><subfield code="a">DE-11</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/73</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 272f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Algorithms and techniques for VLSI layout synthesis</subfield><subfield code="c">by Dwight Hill ...</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Kluwer Acad. Publ.</subfield><subfield code="c">1989</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XII, 212 S.</subfield><subfield code="b">zahlr. graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">65 : VLSI, computer architecture and digital signal processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuit layout</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Computer-aided design</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Geometrische Ordnung</subfield><subfield code="0">(DE-588)4156719-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Datenstruktur</subfield><subfield code="0">(DE-588)4011146-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Design</subfield><subfield code="0">(DE-588)4011510-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Layout</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4264372-7</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Layout</subfield><subfield code="g">Mikroelektronik</subfield><subfield code="0">(DE-588)4264372-7</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">Geometrische Ordnung</subfield><subfield code="0">(DE-588)4156719-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="3" ind2="0"><subfield code="a">Algorithmus</subfield><subfield code="0">(DE-588)4001183-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="3" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="4" ind2="0"><subfield code="a">Design</subfield><subfield code="0">(DE-588)4011510-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="4" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="5" ind2="0"><subfield code="a">Datenstruktur</subfield><subfield code="0">(DE-588)4011146-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="5" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hill, Dwight D.</subfield><subfield code="e">Sonstige</subfield><subfield code="0">(DE-588)142015199</subfield><subfield code="4">oth</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">The Kluwer international series in engineering and computer science</subfield><subfield code="v">65 : VLSI, computer architecture and digital signal processing</subfield><subfield code="w">(DE-604)BV023545171</subfield><subfield code="9">65</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-002277975</subfield></datafield></record></collection> |
id | DE-604.BV003578079 |
illustrated | Illustrated |
indexdate | 2024-07-09T16:02:11Z |
institution | BVB |
isbn | 0898383013 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-002277975 |
oclc_num | 18557274 |
open_access_boolean | |
owner | DE-91G DE-BY-TUM DE-739 DE-898 DE-BY-UBR DE-83 DE-11 |
owner_facet | DE-91G DE-BY-TUM DE-739 DE-898 DE-BY-UBR DE-83 DE-11 |
physical | XII, 212 S. zahlr. graph. Darst. |
publishDate | 1989 |
publishDateSearch | 1989 |
publishDateSort | 1989 |
publisher | Kluwer Acad. Publ. |
record_format | marc |
series | The Kluwer international series in engineering and computer science |
series2 | The Kluwer international series in engineering and computer science |
spelling | Algorithms and techniques for VLSI layout synthesis by Dwight Hill ... Boston [u.a.] Kluwer Acad. Publ. 1989 XII, 212 S. zahlr. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 65 : VLSI, computer architecture and digital signal processing Circuits intégrés Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Geometrische Ordnung (DE-588)4156719-5 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf Datenstruktur (DE-588)4011146-5 gnd rswk-swf Algorithmus (DE-588)4001183-5 gnd rswk-swf Design (DE-588)4011510-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Layout Mikroelektronik (DE-588)4264372-7 gnd rswk-swf VLSI (DE-588)4117388-0 s Layout Mikroelektronik (DE-588)4264372-7 s DE-604 Entwurf (DE-588)4121208-3 s Geometrische Ordnung (DE-588)4156719-5 s Algorithmus (DE-588)4001183-5 s Design (DE-588)4011510-0 s Datenstruktur (DE-588)4011146-5 s Hill, Dwight D. Sonstige (DE-588)142015199 oth The Kluwer international series in engineering and computer science 65 : VLSI, computer architecture and digital signal processing (DE-604)BV023545171 65 |
spellingShingle | Algorithms and techniques for VLSI layout synthesis The Kluwer international series in engineering and computer science Circuits intégrés Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Geometrische Ordnung (DE-588)4156719-5 gnd Entwurf (DE-588)4121208-3 gnd Datenstruktur (DE-588)4011146-5 gnd Algorithmus (DE-588)4001183-5 gnd Design (DE-588)4011510-0 gnd VLSI (DE-588)4117388-0 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd |
subject_GND | (DE-588)4156719-5 (DE-588)4121208-3 (DE-588)4011146-5 (DE-588)4001183-5 (DE-588)4011510-0 (DE-588)4117388-0 (DE-588)4264372-7 |
title | Algorithms and techniques for VLSI layout synthesis |
title_auth | Algorithms and techniques for VLSI layout synthesis |
title_exact_search | Algorithms and techniques for VLSI layout synthesis |
title_full | Algorithms and techniques for VLSI layout synthesis by Dwight Hill ... |
title_fullStr | Algorithms and techniques for VLSI layout synthesis by Dwight Hill ... |
title_full_unstemmed | Algorithms and techniques for VLSI layout synthesis by Dwight Hill ... |
title_short | Algorithms and techniques for VLSI layout synthesis |
title_sort | algorithms and techniques for vlsi layout synthesis |
topic | Circuits intégrés Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Geometrische Ordnung (DE-588)4156719-5 gnd Entwurf (DE-588)4121208-3 gnd Datenstruktur (DE-588)4011146-5 gnd Algorithmus (DE-588)4001183-5 gnd Design (DE-588)4011510-0 gnd VLSI (DE-588)4117388-0 gnd Layout Mikroelektronik (DE-588)4264372-7 gnd |
topic_facet | Circuits intégrés Integrated circuit layout Computer-aided design Integrated circuits Very large scale integration Computer-aided design Geometrische Ordnung Entwurf Datenstruktur Algorithmus Design VLSI Layout Mikroelektronik |
volume_link | (DE-604)BV023545171 |
work_keys_str_mv | AT hilldwightd algorithmsandtechniquesforvlsilayoutsynthesis |