Testing and reliable design of CMOS circuits:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston u.a.
Kluwer Acad. Publ.
1990
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
88 |
| Schlagworte: | |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XII, 231 S. graph. Darst. |
| ISBN: | 0792390563 |
Internformat
MARC
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| 035 | |a (DE-599)BVBBV002764946 | ||
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| 100 | 1 | |a Jha, Niraj K. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Testing and reliable design of CMOS circuits |c by Niraj K. Jha and Sandip Kundu |
| 264 | 1 | |a Boston u.a. |b Kluwer Acad. Publ. |c 1990 | |
| 300 | |a XII, 231 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 88 | |
| 500 | |a Literaturangaben | ||
| 650 | 7 | |a Circuits intégrés à très grande échelle - Essais |2 ram | |
| 650 | 7 | |a MOS complémentaires - Essais |2 ram | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 4 | |a Metal oxide semiconductors, Complementary |x Reliability | |
| 650 | 4 | |a Metal oxide semiconductors, Complementary |x Testing | |
| 650 | 0 | 7 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Zuverlässigkeit |0 (DE-588)4059245-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Prüftechnik |0 (DE-588)4047610-8 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
| 689 | 0 | 1 | |a Prüftechnik |0 (DE-588)4047610-8 |D s |
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| 689 | 1 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
| 689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 1 | 2 | |a Zuverlässigkeit |0 (DE-588)4059245-5 |D s |
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| 689 | 2 | 0 | |a CMOS-Schaltung |0 (DE-588)4148111-2 |D s |
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| 700 | 1 | |a Kundu, Sandip |e Verfasser |4 aut | |
| 830 | 0 | |a The Kluwer international series in engineering and computer science |v 88 |w (DE-604)BV023545171 |9 88 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-001766718 | ||
Datensatz im Suchindex
| _version_ | 1804117116224274432 |
|---|---|
| any_adam_object | |
| author | Jha, Niraj K. Kundu, Sandip |
| author_facet | Jha, Niraj K. Kundu, Sandip |
| author_role | aut aut |
| author_sort | Jha, Niraj K. |
| author_variant | n k j nk nkj s k sk |
| building | Verbundindex |
| bvnumber | BV002764946 |
| callnumber-first | T - Technology |
| callnumber-label | TK7871 |
| callnumber-raw | TK7871.99.M44 |
| callnumber-search | TK7871.99.M44 |
| callnumber-sort | TK 47871.99 M44 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 |
| classification_tum | ELT 272f ELT 238f |
| ctrlnum | (OCoLC)20490432 (DE-599)BVBBV002764946 |
| dewey-full | 621.39/732 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/732 |
| dewey-search | 621.39/732 |
| dewey-sort | 3621.39 3732 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV002764946 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:49:17Z |
| institution | BVB |
| isbn | 0792390563 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001766718 |
| oclc_num | 20490432 |
| open_access_boolean | |
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| owner_facet | DE-91 DE-BY-TUM DE-739 DE-29T DE-898 DE-BY-UBR |
| physical | XII, 231 S. graph. Darst. |
| publishDate | 1990 |
| publishDateSearch | 1990 |
| publishDateSort | 1990 |
| publisher | Kluwer Acad. Publ. |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Jha, Niraj K. Verfasser aut Testing and reliable design of CMOS circuits by Niraj K. Jha and Sandip Kundu Boston u.a. Kluwer Acad. Publ. 1990 XII, 231 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 88 Literaturangaben Circuits intégrés à très grande échelle - Essais ram MOS complémentaires - Essais ram Integrated circuits Very large scale integration Design and construction Metal oxide semiconductors, Complementary Reliability Metal oxide semiconductors, Complementary Testing CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf Zuverlässigkeit (DE-588)4059245-5 gnd rswk-swf Prüftechnik (DE-588)4047610-8 gnd rswk-swf Entwurf (DE-588)4121208-3 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 s Prüftechnik (DE-588)4047610-8 s DE-604 Entwurf (DE-588)4121208-3 s Zuverlässigkeit (DE-588)4059245-5 s Kundu, Sandip Verfasser aut The Kluwer international series in engineering and computer science 88 (DE-604)BV023545171 88 |
| spellingShingle | Jha, Niraj K. Kundu, Sandip Testing and reliable design of CMOS circuits The Kluwer international series in engineering and computer science Circuits intégrés à très grande échelle - Essais ram MOS complémentaires - Essais ram Integrated circuits Very large scale integration Design and construction Metal oxide semiconductors, Complementary Reliability Metal oxide semiconductors, Complementary Testing CMOS-Schaltung (DE-588)4148111-2 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Prüftechnik (DE-588)4047610-8 gnd Entwurf (DE-588)4121208-3 gnd |
| subject_GND | (DE-588)4148111-2 (DE-588)4059245-5 (DE-588)4047610-8 (DE-588)4121208-3 |
| title | Testing and reliable design of CMOS circuits |
| title_auth | Testing and reliable design of CMOS circuits |
| title_exact_search | Testing and reliable design of CMOS circuits |
| title_full | Testing and reliable design of CMOS circuits by Niraj K. Jha and Sandip Kundu |
| title_fullStr | Testing and reliable design of CMOS circuits by Niraj K. Jha and Sandip Kundu |
| title_full_unstemmed | Testing and reliable design of CMOS circuits by Niraj K. Jha and Sandip Kundu |
| title_short | Testing and reliable design of CMOS circuits |
| title_sort | testing and reliable design of cmos circuits |
| topic | Circuits intégrés à très grande échelle - Essais ram MOS complémentaires - Essais ram Integrated circuits Very large scale integration Design and construction Metal oxide semiconductors, Complementary Reliability Metal oxide semiconductors, Complementary Testing CMOS-Schaltung (DE-588)4148111-2 gnd Zuverlässigkeit (DE-588)4059245-5 gnd Prüftechnik (DE-588)4047610-8 gnd Entwurf (DE-588)4121208-3 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Essais MOS complémentaires - Essais Integrated circuits Very large scale integration Design and construction Metal oxide semiconductors, Complementary Reliability Metal oxide semiconductors, Complementary Testing CMOS-Schaltung Zuverlässigkeit Prüftechnik Entwurf |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT jhanirajk testingandreliabledesignofcmoscircuits AT kundusandip testingandreliabledesignofcmoscircuits |