Unified methods for VLSI simulation and test generation:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Boston [u.a.]
Kluwer Acad. Publ.
1989
|
| Schriftenreihe: | The Kluwer international series in engineering and computer science
73 |
| Schlagworte: | |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XII, 148 S. graph. Darst. |
| ISBN: | 0792390253 |
Internformat
MARC
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| 100 | 1 | |a Cheng, Kwang-Ting |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Unified methods for VLSI simulation and test generation |c by Kwang-Ting Cheng and Vishwani D. Agrawal |
| 264 | 1 | |a Boston [u.a.] |b Kluwer Acad. Publ. |c 1989 | |
| 300 | |a XII, 148 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a The Kluwer international series in engineering and computer science |v 73 | |
| 500 | |a Literaturangaben | ||
| 650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction - Informatique | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Essais | |
| 650 | 4 | |a Circuits intégrés à très grande échelle - Simulation par ordinateur | |
| 650 | 4 | |a Conception assistée par ordinateur | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer simulation | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Computer-aided design | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Testing | |
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| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
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| 650 | 0 | 7 | |a Simulation |0 (DE-588)4055072-2 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
| _version_ | 1804117025430175744 |
|---|---|
| any_adam_object | |
| author | Cheng, Kwang-Ting Agrawal, Vishwani D. |
| author_facet | Cheng, Kwang-Ting Agrawal, Vishwani D. |
| author_role | aut aut |
| author_sort | Cheng, Kwang-Ting |
| author_variant | k t c ktc v d a vd vda |
| building | Verbundindex |
| bvnumber | BV002645324 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_tum | ELT 359f ELT 272f |
| ctrlnum | (OCoLC)19723668 (DE-599)BVBBV002645324 |
| dewey-full | 621.39/5 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.39/5 |
| dewey-search | 621.39/5 |
| dewey-sort | 3621.39 15 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV002645324 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:47:50Z |
| institution | BVB |
| isbn | 0792390253 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001697369 |
| oclc_num | 19723668 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-29T DE-739 DE-83 DE-11 |
| owner_facet | DE-91G DE-BY-TUM DE-29T DE-739 DE-83 DE-11 |
| physical | XII, 148 S. graph. Darst. |
| publishDate | 1989 |
| publishDateSearch | 1989 |
| publishDateSort | 1989 |
| publisher | Kluwer Acad. Publ. |
| record_format | marc |
| series | The Kluwer international series in engineering and computer science |
| series2 | The Kluwer international series in engineering and computer science |
| spelling | Cheng, Kwang-Ting Verfasser aut Unified methods for VLSI simulation and test generation by Kwang-Ting Cheng and Vishwani D. Agrawal Boston [u.a.] Kluwer Acad. Publ. 1989 XII, 148 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier The Kluwer international series in engineering and computer science 73 Literaturangaben Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Essais Circuits intégrés à très grande échelle - Simulation par ordinateur Conception assistée par ordinateur Integrated circuits Very large scale integration Computer simulation Integrated circuits Very large scale integration Computer-aided design Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd rswk-swf Fehleranalyse (DE-588)4016608-9 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf Fehlersimulation (DE-588)4234819-5 gnd rswk-swf VLSI (DE-588)4117388-0 s Prüftechnik (DE-588)4047610-8 s DE-604 Simulation (DE-588)4055072-2 s Fehleranalyse (DE-588)4016608-9 s Schaltungsentwurf (DE-588)4179389-4 s Fehlersimulation (DE-588)4234819-5 s Integrierte Schaltung (DE-588)4027242-4 s Agrawal, Vishwani D. Verfasser aut The Kluwer international series in engineering and computer science 73 (DE-604)BV023545171 73 |
| spellingShingle | Cheng, Kwang-Ting Agrawal, Vishwani D. Unified methods for VLSI simulation and test generation The Kluwer international series in engineering and computer science Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Essais Circuits intégrés à très grande échelle - Simulation par ordinateur Conception assistée par ordinateur Integrated circuits Very large scale integration Computer simulation Integrated circuits Very large scale integration Computer-aided design Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd Fehleranalyse (DE-588)4016608-9 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Simulation (DE-588)4055072-2 gnd Fehlersimulation (DE-588)4234819-5 gnd |
| subject_GND | (DE-588)4047610-8 (DE-588)4016608-9 (DE-588)4179389-4 (DE-588)4117388-0 (DE-588)4027242-4 (DE-588)4055072-2 (DE-588)4234819-5 |
| title | Unified methods for VLSI simulation and test generation |
| title_auth | Unified methods for VLSI simulation and test generation |
| title_exact_search | Unified methods for VLSI simulation and test generation |
| title_full | Unified methods for VLSI simulation and test generation by Kwang-Ting Cheng and Vishwani D. Agrawal |
| title_fullStr | Unified methods for VLSI simulation and test generation by Kwang-Ting Cheng and Vishwani D. Agrawal |
| title_full_unstemmed | Unified methods for VLSI simulation and test generation by Kwang-Ting Cheng and Vishwani D. Agrawal |
| title_short | Unified methods for VLSI simulation and test generation |
| title_sort | unified methods for vlsi simulation and test generation |
| topic | Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Essais Circuits intégrés à très grande échelle - Simulation par ordinateur Conception assistée par ordinateur Integrated circuits Very large scale integration Computer simulation Integrated circuits Very large scale integration Computer-aided design Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd Fehleranalyse (DE-588)4016608-9 gnd Schaltungsentwurf (DE-588)4179389-4 gnd VLSI (DE-588)4117388-0 gnd Integrierte Schaltung (DE-588)4027242-4 gnd Simulation (DE-588)4055072-2 gnd Fehlersimulation (DE-588)4234819-5 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction - Informatique Circuits intégrés à très grande échelle - Essais Circuits intégrés à très grande échelle - Simulation par ordinateur Conception assistée par ordinateur Integrated circuits Very large scale integration Computer simulation Integrated circuits Very large scale integration Computer-aided design Integrated circuits Very large scale integration Testing Prüftechnik Fehleranalyse Schaltungsentwurf VLSI Integrierte Schaltung Simulation Fehlersimulation |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT chengkwangting unifiedmethodsforvlsisimulationandtestgeneration AT agrawalvishwanid unifiedmethodsforvlsisimulationandtestgeneration |