VLSI: testing and validation techniques VLSI, testing & validation techniques:
Gespeichert in:
| Format: | Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Washington, DC
IEEE Computer Soc. Press
1985
|
| Schlagworte: | |
| Beschreibung: | Literaturverz. S. 579 - 596 |
| Beschreibung: | IX, 602 S. Ill., graph. Darst. |
| ISBN: | 0444879471 |
Internformat
MARC
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| 245 | 1 | 0 | |a VLSI: testing and validation techniques VLSI, testing & validation techniques |c Hassan K. Reghbati |
| 246 | 1 | 3 | |a Testing & validation techniques |
| 246 | 1 | 3 | |a VLSI: testing and validation techniques |
| 264 | 1 | |a Washington, DC |b IEEE Computer Soc. Press |c 1985 | |
| 300 | |a IX, 602 S. |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
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| 650 | 7 | |a test VLSI |2 inriac | |
| 650 | 7 | |a test circuit |2 inriac | |
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| 700 | 1 | |a Reghbati, Hassan K. |e Sonstige |4 oth | |
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Datensatz im Suchindex
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| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV002301078 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:43:39Z |
| institution | BVB |
| isbn | 0444879471 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001512273 |
| oclc_num | 13361592 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-91 DE-BY-TUM DE-384 DE-739 DE-29T |
| owner_facet | DE-91G DE-BY-TUM DE-91 DE-BY-TUM DE-384 DE-739 DE-29T |
| physical | IX, 602 S. Ill., graph. Darst. |
| publishDate | 1985 |
| publishDateSearch | 1985 |
| publishDateSort | 1985 |
| publisher | IEEE Computer Soc. Press |
| record_format | marc |
| spelling | VLSI: testing and validation techniques VLSI, testing & validation techniques Hassan K. Reghbati Testing & validation techniques VLSI: testing and validation techniques Washington, DC IEEE Computer Soc. Press 1985 IX, 602 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Literaturverz. S. 579 - 596 VLSI inriac autotest inriac conception VLSI inriac test VLSI inriac test circuit inriac Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf Test (DE-588)4059549-3 gnd rswk-swf Test (DE-588)4059549-3 s CAD (DE-588)4069794-0 s VLSI (DE-588)4117388-0 s DE-604 Prüftechnik (DE-588)4047610-8 s Reghbati, Hassan K. Sonstige oth |
| spellingShingle | VLSI: testing and validation techniques VLSI, testing & validation techniques VLSI inriac autotest inriac conception VLSI inriac test VLSI inriac test circuit inriac Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd Test (DE-588)4059549-3 gnd |
| subject_GND | (DE-588)4047610-8 (DE-588)4117388-0 (DE-588)4069794-0 (DE-588)4059549-3 |
| title | VLSI: testing and validation techniques VLSI, testing & validation techniques |
| title_alt | Testing & validation techniques VLSI: testing and validation techniques |
| title_auth | VLSI: testing and validation techniques VLSI, testing & validation techniques |
| title_exact_search | VLSI: testing and validation techniques VLSI, testing & validation techniques |
| title_full | VLSI: testing and validation techniques VLSI, testing & validation techniques Hassan K. Reghbati |
| title_fullStr | VLSI: testing and validation techniques VLSI, testing & validation techniques Hassan K. Reghbati |
| title_full_unstemmed | VLSI: testing and validation techniques VLSI, testing & validation techniques Hassan K. Reghbati |
| title_short | VLSI: testing and validation techniques VLSI, testing & validation techniques |
| title_sort | vlsi testing and validation techniques vlsi testing validation techniques |
| topic | VLSI inriac autotest inriac conception VLSI inriac test VLSI inriac test circuit inriac Integrated circuits Very large scale integration Testing Prüftechnik (DE-588)4047610-8 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd Test (DE-588)4059549-3 gnd |
| topic_facet | VLSI autotest conception VLSI test VLSI test circuit Integrated circuits Very large scale integration Testing Prüftechnik CAD Test |
| work_keys_str_mv | AT reghbatihassank vlsitestingandvalidationtechniquesvlsitestingvalidationtechniques AT reghbatihassank testingvalidationtechniques AT reghbatihassank vlsitestingandvalidationtechniques |