Logic minimization algorithms for VLSI synthesis:
Saved in:
| Format: | Book |
|---|---|
| Language: | Undetermined |
| Published: |
Boston u.a.
Kluwer
1986
|
| Edition: | 4. print. |
| Series: | Kluwer international series in engineering and computer science.
2. |
| Subjects: | |
| Physical Description: | IX, 192 S. graph. Darst. |
| ISBN: | 0898381649 |
Staff View
MARC
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| 245 | 1 | 0 | |a Logic minimization algorithms for VLSI synthesis |c by Robert K. Brayton ... |
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Record in the Search Index
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| building | Verbundindex |
| bvnumber | BV002290645 |
| classification_rvk | ST 190 ZN 4950 |
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| ctrlnum | (OCoLC)257824201 (DE-599)BVBBV002290645 |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 4. print. |
| format | Book |
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| id | DE-604.BV002290645 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:43:28Z |
| institution | BVB |
| isbn | 0898381649 |
| language | Undetermined |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001505262 |
| oclc_num | 257824201 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-29T |
| owner_facet | DE-91G DE-BY-TUM DE-29T |
| physical | IX, 192 S. graph. Darst. |
| publishDate | 1986 |
| publishDateSearch | 1986 |
| publishDateSort | 1986 |
| publisher | Kluwer |
| record_format | marc |
| series | Kluwer international series in engineering and computer science. |
| series2 | Kluwer international series in engineering and computer science. |
| spelling | Logic minimization algorithms for VLSI synthesis by Robert K. Brayton ... 4. print. Boston u.a. Kluwer 1986 IX, 192 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Kluwer international series in engineering and computer science. 2. Algorithmus (DE-588)4001183-5 gnd rswk-swf Synthese (DE-588)4418958-8 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Optimierung (DE-588)4043664-0 gnd rswk-swf Minimierung (DE-588)4251074-0 gnd rswk-swf VLSI (DE-588)4117388-0 s Synthese (DE-588)4418958-8 s Minimierung (DE-588)4251074-0 s Algorithmus (DE-588)4001183-5 s DE-604 Optimierung (DE-588)4043664-0 s 1\p DE-604 Brayton, Robert K. Sonstige oth Kluwer international series in engineering and computer science. 2. (DE-604)BV023545171 2. 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Logic minimization algorithms for VLSI synthesis Kluwer international series in engineering and computer science. Algorithmus (DE-588)4001183-5 gnd Synthese (DE-588)4418958-8 gnd VLSI (DE-588)4117388-0 gnd Optimierung (DE-588)4043664-0 gnd Minimierung (DE-588)4251074-0 gnd |
| subject_GND | (DE-588)4001183-5 (DE-588)4418958-8 (DE-588)4117388-0 (DE-588)4043664-0 (DE-588)4251074-0 |
| title | Logic minimization algorithms for VLSI synthesis |
| title_auth | Logic minimization algorithms for VLSI synthesis |
| title_exact_search | Logic minimization algorithms for VLSI synthesis |
| title_full | Logic minimization algorithms for VLSI synthesis by Robert K. Brayton ... |
| title_fullStr | Logic minimization algorithms for VLSI synthesis by Robert K. Brayton ... |
| title_full_unstemmed | Logic minimization algorithms for VLSI synthesis by Robert K. Brayton ... |
| title_short | Logic minimization algorithms for VLSI synthesis |
| title_sort | logic minimization algorithms for vlsi synthesis |
| topic | Algorithmus (DE-588)4001183-5 gnd Synthese (DE-588)4418958-8 gnd VLSI (DE-588)4117388-0 gnd Optimierung (DE-588)4043664-0 gnd Minimierung (DE-588)4251074-0 gnd |
| topic_facet | Algorithmus Synthese VLSI Optimierung Minimierung |
| volume_link | (DE-604)BV023545171 |
| work_keys_str_mv | AT braytonrobertk logicminimizationalgorithmsforvlsisynthesis |