Design methodologies:
Gespeichert in:
| Format: | Buch |
|---|---|
| Sprache: | English |
| Veröffentlicht: |
Amsterdam u.a.
North-Holland
1986
|
| Schriftenreihe: | Advances in CAD for VLSI.
6. |
| Schlagworte: | |
| Beschreibung: | Literaturangaben |
| Beschreibung: | XII, 537 S. graph. Darst. |
| ISBN: | 0444878963 |
Internformat
MARC
| LEADER | 00000nam a2200000 cb4500 | ||
|---|---|---|---|
| 001 | BV002122566 | ||
| 003 | DE-604 | ||
| 005 | 19891123 | ||
| 007 | t | ||
| 008 | 890928s1986 d||| |||| 00||| eng d | ||
| 020 | |a 0444878963 |9 0-444-87896-3 | ||
| 035 | |a (OCoLC)13064028 | ||
| 035 | |a (DE-599)BVBBV002122566 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91G |a DE-739 |a DE-20 |a DE-29T | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.395 |2 19 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ST 195 |0 (DE-625)143608: |2 rvk | ||
| 084 | |a ZN 4950 |0 (DE-625)157424: |2 rvk | ||
| 084 | |a ELT 355f |2 stub | ||
| 245 | 1 | 0 | |a Design methodologies |c ed. by S. Goto |
| 264 | 1 | |a Amsterdam u.a. |b North-Holland |c 1986 | |
| 300 | |a XII, 537 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 490 | 1 | |a Advances in CAD for VLSI. |v 6. | |
| 500 | |a Literaturangaben | ||
| 650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 655 | 7 | |0 (DE-588)4143413-4 |a Aufsatzsammlung |2 gnd-content | |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 1 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
| 689 | 1 | |5 DE-604 | |
| 700 | 1 | |a Gotō, Satoshi |e Sonstige |4 oth | |
| 830 | 0 | |a Advances in CAD for VLSI. |v 6. |w (DE-604)BV001897464 |9 6. | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-001391803 | ||
Datensatz im Suchindex
| _version_ | 1804116576016793600 |
|---|---|
| any_adam_object | |
| building | Verbundindex |
| bvnumber | BV002122566 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 ST 195 ZN 4950 |
| classification_tum | ELT 355f |
| ctrlnum | (OCoLC)13064028 (DE-599)BVBBV002122566 |
| dewey-full | 621.395 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.395 |
| dewey-search | 621.395 |
| dewey-sort | 3621.395 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01718nam a2200505 cb4500</leader><controlfield tag="001">BV002122566</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19891123 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">890928s1986 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0444878963</subfield><subfield code="9">0-444-87896-3</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)13064028</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV002122566</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-20</subfield><subfield code="a">DE-29T</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.395</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 195</subfield><subfield code="0">(DE-625)143608:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4950</subfield><subfield code="0">(DE-625)157424:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 355f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Design methodologies</subfield><subfield code="c">ed. by S. Goto</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Amsterdam u.a.</subfield><subfield code="b">North-Holland</subfield><subfield code="c">1986</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XII, 537 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">Advances in CAD for VLSI.</subfield><subfield code="v">6.</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Literaturangaben</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="655" ind1=" " ind2="7"><subfield code="0">(DE-588)4143413-4</subfield><subfield code="a">Aufsatzsammlung</subfield><subfield code="2">gnd-content</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gotō, Satoshi</subfield><subfield code="e">Sonstige</subfield><subfield code="4">oth</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">Advances in CAD for VLSI.</subfield><subfield code="v">6.</subfield><subfield code="w">(DE-604)BV001897464</subfield><subfield code="9">6.</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-001391803</subfield></datafield></record></collection> |
| genre | (DE-588)4143413-4 Aufsatzsammlung gnd-content |
| genre_facet | Aufsatzsammlung |
| id | DE-604.BV002122566 |
| illustrated | Illustrated |
| indexdate | 2024-07-09T15:40:42Z |
| institution | BVB |
| isbn | 0444878963 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001391803 |
| oclc_num | 13064028 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-739 DE-20 DE-29T |
| owner_facet | DE-91G DE-BY-TUM DE-739 DE-20 DE-29T |
| physical | XII, 537 S. graph. Darst. |
| publishDate | 1986 |
| publishDateSearch | 1986 |
| publishDateSort | 1986 |
| publisher | North-Holland |
| record_format | marc |
| series | Advances in CAD for VLSI. |
| series2 | Advances in CAD for VLSI. |
| spelling | Design methodologies ed. by S. Goto Amsterdam u.a. North-Holland 1986 XII, 537 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Advances in CAD for VLSI. 6. Literaturangaben Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf (DE-588)4143413-4 Aufsatzsammlung gnd-content VLSI (DE-588)4117388-0 s CAD (DE-588)4069794-0 s DE-604 Entwurf (DE-588)4121208-3 s Gotō, Satoshi Sonstige oth Advances in CAD for VLSI. 6. (DE-604)BV001897464 6. |
| spellingShingle | Design methodologies Advances in CAD for VLSI. Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4121208-3 (DE-588)4117388-0 (DE-588)4069794-0 (DE-588)4143413-4 |
| title | Design methodologies |
| title_auth | Design methodologies |
| title_exact_search | Design methodologies |
| title_full | Design methodologies ed. by S. Goto |
| title_fullStr | Design methodologies ed. by S. Goto |
| title_full_unstemmed | Design methodologies ed. by S. Goto |
| title_short | Design methodologies |
| title_sort | design methodologies |
| topic | Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction Entwurf VLSI CAD Aufsatzsammlung |
| volume_link | (DE-604)BV001897464 |
| work_keys_str_mv | AT gotosatoshi designmethodologies |