Circuit analysis by computer: from algorithms to package
Gespeichert in:
Hauptverfasser: | , |
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Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Englewood Cliffs, NJ u.a.
Prentice-Hall
1986
|
Schlagworte: | |
Beschreibung: | XIII, 458 S. graph. Darst. |
ISBN: | 0131340247 0131340166 |
Internformat
MARC
LEADER | 00000nam a2200000 c 4500 | ||
---|---|---|---|
001 | BV002051732 | ||
003 | DE-604 | ||
005 | 20090821 | ||
007 | t | ||
008 | 890928s1986 d||| |||| 00||| eng d | ||
020 | |a 0131340247 |9 0-13-134024-7 | ||
020 | |a 0131340166 |9 0-13-134016-6 | ||
035 | |a (OCoLC)13761713 | ||
035 | |a (DE-599)BVBBV002051732 | ||
040 | |a DE-604 |b ger |e rakddb | ||
041 | 0 | |a eng | |
049 | |a DE-91 |a DE-92 |a DE-739 |a DE-29T | ||
050 | 0 | |a TK454 | |
082 | 0 | |a 621.319/2/02854 |2 19 | |
084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
084 | |a ZN 5400 |0 (DE-625)157454: |2 rvk | ||
084 | |a ELT 416f |2 stub | ||
100 | 1 | |a Spence, Robert |e Verfasser |4 aut | |
245 | 1 | 0 | |a Circuit analysis by computer |b from algorithms to package |c Robert Spence and John P. Burgess |
264 | 1 | |a Englewood Cliffs, NJ u.a. |b Prentice-Hall |c 1986 | |
300 | |a XIII, 458 S. |b graph. Darst. | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
650 | 7 | |a Circuits électriques - Analyse - Informatique |2 ram | |
650 | 4 | |a Datenverarbeitung | |
650 | 4 | |a Electric circuit analysis |x Data processing | |
650 | 0 | 7 | |a Logischer Entwurf |0 (DE-588)4168051-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Analyse |0 (DE-588)4122795-5 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Logische Schaltung |0 (DE-588)4131023-8 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Computerunterstütztes Verfahren |0 (DE-588)4139030-1 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Netzwerkanalyse |0 (DE-588)4075298-7 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Computer |0 (DE-588)4070083-5 |2 gnd |9 rswk-swf |
655 | 7 | |a Computerunterstützte Netzwerkanalyse |2 gnd |9 rswk-swf | |
689 | 0 | 0 | |a Computerunterstützte Netzwerkanalyse |A f |
689 | 0 | |5 DE-604 | |
689 | 1 | 0 | |a Netzwerkanalyse |0 (DE-588)4075298-7 |D s |
689 | 1 | 1 | |a Computerunterstütztes Verfahren |0 (DE-588)4139030-1 |D s |
689 | 1 | |5 DE-604 | |
689 | 2 | 0 | |a Computer |0 (DE-588)4070083-5 |D s |
689 | 2 | 1 | |a Logischer Entwurf |0 (DE-588)4168051-0 |D s |
689 | 2 | |5 DE-604 | |
689 | 3 | 0 | |a Logische Schaltung |0 (DE-588)4131023-8 |D s |
689 | 3 | 1 | |a Analyse |0 (DE-588)4122795-5 |D s |
689 | 3 | 2 | |a Computer |0 (DE-588)4070083-5 |D s |
689 | 3 | |5 DE-604 | |
700 | 1 | |a Burgess, John P. |d 1938- |e Verfasser |0 (DE-588)139005366 |4 aut | |
999 | |a oai:aleph.bib-bvb.de:BVB01-001341639 |
Datensatz im Suchindex
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---|---|
any_adam_object | |
author | Spence, Robert Burgess, John P. 1938- |
author_GND | (DE-588)139005366 |
author_facet | Spence, Robert Burgess, John P. 1938- |
author_role | aut aut |
author_sort | Spence, Robert |
author_variant | r s rs j p b jp jpb |
building | Verbundindex |
bvnumber | BV002051732 |
callnumber-first | T - Technology |
callnumber-label | TK454 |
callnumber-raw | TK454 |
callnumber-search | TK454 |
callnumber-sort | TK 3454 |
callnumber-subject | TK - Electrical and Nuclear Engineering |
classification_rvk | ST 190 ZN 5400 |
classification_tum | ELT 416f |
ctrlnum | (OCoLC)13761713 (DE-599)BVBBV002051732 |
dewey-full | 621.319/2/02854 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.319/2/02854 |
dewey-search | 621.319/2/02854 |
dewey-sort | 3621.319 12 42854 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Book |
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genre | Computerunterstützte Netzwerkanalyse gnd |
genre_facet | Computerunterstützte Netzwerkanalyse |
id | DE-604.BV002051732 |
illustrated | Illustrated |
indexdate | 2024-07-09T15:39:31Z |
institution | BVB |
isbn | 0131340247 0131340166 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001341639 |
oclc_num | 13761713 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM DE-92 DE-739 DE-29T |
owner_facet | DE-91 DE-BY-TUM DE-92 DE-739 DE-29T |
physical | XIII, 458 S. graph. Darst. |
publishDate | 1986 |
publishDateSearch | 1986 |
publishDateSort | 1986 |
publisher | Prentice-Hall |
record_format | marc |
spelling | Spence, Robert Verfasser aut Circuit analysis by computer from algorithms to package Robert Spence and John P. Burgess Englewood Cliffs, NJ u.a. Prentice-Hall 1986 XIII, 458 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Circuits électriques - Analyse - Informatique ram Datenverarbeitung Electric circuit analysis Data processing Logischer Entwurf (DE-588)4168051-0 gnd rswk-swf Analyse (DE-588)4122795-5 gnd rswk-swf Logische Schaltung (DE-588)4131023-8 gnd rswk-swf Computerunterstütztes Verfahren (DE-588)4139030-1 gnd rswk-swf Netzwerkanalyse (DE-588)4075298-7 gnd rswk-swf Computer (DE-588)4070083-5 gnd rswk-swf Computerunterstützte Netzwerkanalyse gnd rswk-swf Computerunterstützte Netzwerkanalyse f DE-604 Netzwerkanalyse (DE-588)4075298-7 s Computerunterstütztes Verfahren (DE-588)4139030-1 s Computer (DE-588)4070083-5 s Logischer Entwurf (DE-588)4168051-0 s Logische Schaltung (DE-588)4131023-8 s Analyse (DE-588)4122795-5 s Burgess, John P. 1938- Verfasser (DE-588)139005366 aut |
spellingShingle | Spence, Robert Burgess, John P. 1938- Circuit analysis by computer from algorithms to package Circuits électriques - Analyse - Informatique ram Datenverarbeitung Electric circuit analysis Data processing Logischer Entwurf (DE-588)4168051-0 gnd Analyse (DE-588)4122795-5 gnd Logische Schaltung (DE-588)4131023-8 gnd Computerunterstütztes Verfahren (DE-588)4139030-1 gnd Netzwerkanalyse (DE-588)4075298-7 gnd Computer (DE-588)4070083-5 gnd |
subject_GND | (DE-588)4168051-0 (DE-588)4122795-5 (DE-588)4131023-8 (DE-588)4139030-1 (DE-588)4075298-7 (DE-588)4070083-5 |
title | Circuit analysis by computer from algorithms to package |
title_auth | Circuit analysis by computer from algorithms to package |
title_exact_search | Circuit analysis by computer from algorithms to package |
title_full | Circuit analysis by computer from algorithms to package Robert Spence and John P. Burgess |
title_fullStr | Circuit analysis by computer from algorithms to package Robert Spence and John P. Burgess |
title_full_unstemmed | Circuit analysis by computer from algorithms to package Robert Spence and John P. Burgess |
title_short | Circuit analysis by computer |
title_sort | circuit analysis by computer from algorithms to package |
title_sub | from algorithms to package |
topic | Circuits électriques - Analyse - Informatique ram Datenverarbeitung Electric circuit analysis Data processing Logischer Entwurf (DE-588)4168051-0 gnd Analyse (DE-588)4122795-5 gnd Logische Schaltung (DE-588)4131023-8 gnd Computerunterstütztes Verfahren (DE-588)4139030-1 gnd Netzwerkanalyse (DE-588)4075298-7 gnd Computer (DE-588)4070083-5 gnd |
topic_facet | Circuits électriques - Analyse - Informatique Datenverarbeitung Electric circuit analysis Data processing Logischer Entwurf Analyse Logische Schaltung Computerunterstütztes Verfahren Netzwerkanalyse Computer Computerunterstützte Netzwerkanalyse |
work_keys_str_mv | AT spencerobert circuitanalysisbycomputerfromalgorithmstopackage AT burgessjohnp circuitanalysisbycomputerfromalgorithmstopackage |