VLSI, silicon compilation and the art of automatic microchip design:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
Englewood Cliffs, NJ
Prentice-Hall
1983
|
| Schlagworte: | |
| Beschreibung: | XIV, 481 S. |
| ISBN: | 0139426809 |
Internformat
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV002024477 | ||
| 003 | DE-604 | ||
| 005 | 19960819 | ||
| 007 | t | ||
| 008 | 890928s1983 |||| 00||| eng d | ||
| 020 | |a 0139426809 |9 0-13-942680-9 | ||
| 035 | |a (OCoLC)916676663 | ||
| 035 | |a (DE-599)BVBBV002024477 | ||
| 040 | |a DE-604 |b ger |e rakddb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-91G |a DE-384 |a DE-92 |a DE-739 |a DE-20 |a DE-706 | ||
| 050 | 0 | |a TK7874 | |
| 082 | 0 | |a 621.381/73 |2 19 | |
| 084 | |a ST 190 |0 (DE-625)143607: |2 rvk | ||
| 084 | |a ZN 4952 |0 (DE-625)157425: |2 rvk | ||
| 084 | |a ELT 355f |2 stub | ||
| 100 | 1 | |a Ayres, Ronald F. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a VLSI, silicon compilation and the art of automatic microchip design |c Ronald F. Ayres |
| 264 | 1 | |a Englewood Cliffs, NJ |b Prentice-Hall |c 1983 | |
| 300 | |a XIV, 481 S. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Circuits intégrés à très grande échelle - Conception et construction | |
| 650 | 4 | |a Integrated circuits |x Very large scale integration |x Design and construction | |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | 1 | |a CAD |0 (DE-588)4069794-0 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 1 | |5 DE-604 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-001322787 | ||
Datensatz im Suchindex
| _version_ | 1804116473863471104 |
|---|---|
| any_adam_object | |
| author | Ayres, Ronald F. |
| author_facet | Ayres, Ronald F. |
| author_role | aut |
| author_sort | Ayres, Ronald F. |
| author_variant | r f a rf rfa |
| building | Verbundindex |
| bvnumber | BV002024477 |
| callnumber-first | T - Technology |
| callnumber-label | TK7874 |
| callnumber-raw | TK7874 |
| callnumber-search | TK7874 |
| callnumber-sort | TK 47874 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ST 190 ZN 4952 |
| classification_tum | ELT 355f |
| ctrlnum | (OCoLC)916676663 (DE-599)BVBBV002024477 |
| dewey-full | 621.381/73 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.381/73 |
| dewey-search | 621.381/73 |
| dewey-sort | 3621.381 273 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Informatik Elektrotechnik Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01416nam a2200421 c 4500</leader><controlfield tag="001">BV002024477</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">19960819 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">890928s1983 |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0139426809</subfield><subfield code="9">0-13-942680-9</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)916676663</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV002024477</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakddb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-91G</subfield><subfield code="a">DE-384</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-739</subfield><subfield code="a">DE-20</subfield><subfield code="a">DE-706</subfield></datafield><datafield tag="050" ind1=" " ind2="0"><subfield code="a">TK7874</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.381/73</subfield><subfield code="2">19</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 190</subfield><subfield code="0">(DE-625)143607:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4952</subfield><subfield code="0">(DE-625)157425:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ELT 355f</subfield><subfield code="2">stub</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Ayres, Ronald F.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">VLSI, silicon compilation and the art of automatic microchip design</subfield><subfield code="c">Ronald F. Ayres</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Englewood Cliffs, NJ</subfield><subfield code="b">Prentice-Hall</subfield><subfield code="c">1983</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIV, 481 S.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits intégrés à très grande échelle - Conception et construction</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Integrated circuits</subfield><subfield code="x">Very large scale integration</subfield><subfield code="x">Design and construction</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-001322787</subfield></datafield></record></collection> |
| id | DE-604.BV002024477 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-09T15:39:04Z |
| institution | BVB |
| isbn | 0139426809 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-001322787 |
| oclc_num | 916676663 |
| open_access_boolean | |
| owner | DE-91G DE-BY-TUM DE-384 DE-92 DE-739 DE-20 DE-706 |
| owner_facet | DE-91G DE-BY-TUM DE-384 DE-92 DE-739 DE-20 DE-706 |
| physical | XIV, 481 S. |
| publishDate | 1983 |
| publishDateSearch | 1983 |
| publishDateSort | 1983 |
| publisher | Prentice-Hall |
| record_format | marc |
| spelling | Ayres, Ronald F. Verfasser aut VLSI, silicon compilation and the art of automatic microchip design Ronald F. Ayres Englewood Cliffs, NJ Prentice-Hall 1983 XIV, 481 S. txt rdacontent n rdamedia nc rdacarrier Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction VLSI (DE-588)4117388-0 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf VLSI (DE-588)4117388-0 s CAD (DE-588)4069794-0 s DE-604 |
| spellingShingle | Ayres, Ronald F. VLSI, silicon compilation and the art of automatic microchip design Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| subject_GND | (DE-588)4117388-0 (DE-588)4069794-0 |
| title | VLSI, silicon compilation and the art of automatic microchip design |
| title_auth | VLSI, silicon compilation and the art of automatic microchip design |
| title_exact_search | VLSI, silicon compilation and the art of automatic microchip design |
| title_full | VLSI, silicon compilation and the art of automatic microchip design Ronald F. Ayres |
| title_fullStr | VLSI, silicon compilation and the art of automatic microchip design Ronald F. Ayres |
| title_full_unstemmed | VLSI, silicon compilation and the art of automatic microchip design Ronald F. Ayres |
| title_short | VLSI, silicon compilation and the art of automatic microchip design |
| title_sort | vlsi silicon compilation and the art of automatic microchip design |
| topic | Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction VLSI (DE-588)4117388-0 gnd CAD (DE-588)4069794-0 gnd |
| topic_facet | Circuits intégrés à très grande échelle - Conception et construction Integrated circuits Very large scale integration Design and construction VLSI CAD |
| work_keys_str_mv | AT ayresronaldf vlsisiliconcompilationandtheartofautomaticmicrochipdesign |