BSIM4 and MOSFET modeling for IC simulation /:
This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emph...
Gespeichert in:
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Singapore :
World Scientific Pub. Co.,
2011.
|
| Schriftenreihe: | International series on advances in solid state electronics and technology.
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emphasis is placed on how the BSIM model evolved into the first ever industry standard SPICE MOSFET model for circuit simulation and CMOS technology development. The discussion covers the theory and methodology of how a MOSFET model, or semiconductor device models in general, can be implemented to be ro. |
| Beschreibung: | 1 online resource (xix, 414 pages) : illustrations |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 9789812813992 9812813993 |
Internformat
MARC
| LEADER | 00000cam a2200000Ma 4500 | ||
|---|---|---|---|
| 001 | ZDB-4-EBA-ocn785777958 | ||
| 003 | OCoLC | ||
| 005 | 20241004212047.0 | ||
| 006 | m o d | ||
| 007 | cr cn||||||||| | ||
| 008 | 120227s2011 si a ob 001 0 eng d | ||
| 040 | |a E7B |b eng |e pn |c E7B |d OCLCQ |d CIT |d OCLCQ |d UKMGB |d UIU |d DEBSZ |d OCLCO |d YDXCP |d OCLCQ |d N$T |d IDEBK |d OCLCF |d BWS |d EBLCP |d OCLCQ |d AGLDB |d OTZ |d OCLCA |d OCLCQ |d VTS |d OCLCQ |d STF |d UKAHL |d OCLCQ |d LEAUB |d AJS |d OCLCO |d OCLCQ |d OCLCO |d OCLCL |d SXB |d OCLCQ | ||
| 016 | 7 | |a 015880451 |2 Uk | |
| 019 | |a 779937767 |a 858228012 |a 903928741 |a 994942856 |a 1063881902 |a 1086430146 | ||
| 020 | |a 9789812813992 |q (electronic bk.) | ||
| 020 | |a 9812813993 |q (electronic bk.) | ||
| 020 | |z 9812568638 | ||
| 020 | |z 9789812568632 | ||
| 035 | |a (OCoLC)785777958 |z (OCoLC)779937767 |z (OCoLC)858228012 |z (OCoLC)903928741 |z (OCoLC)994942856 |z (OCoLC)1063881902 |z (OCoLC)1086430146 | ||
| 050 | 4 | |a TK7871.95 |b .L58 2011eb | |
| 072 | 7 | |a TEC |x 008110 |2 bisacsh | |
| 082 | 7 | |a 621.3815284015118 |2 23 | |
| 049 | |a MAIN | ||
| 100 | 1 | |a Liu, Weidong. | |
| 245 | 1 | 0 | |a BSIM4 and MOSFET modeling for IC simulation / |c Weidong Liu, Chenming Hu. |
| 260 | |a Singapore : |b World Scientific Pub. Co., |c 2011. | ||
| 300 | |a 1 online resource (xix, 414 pages) : |b illustrations | ||
| 336 | |a text |b txt |2 rdacontent | ||
| 337 | |a computer |b c |2 rdamedia | ||
| 338 | |a online resource |b cr |2 rdacarrier | ||
| 490 | 1 | |a International series on advances in solid state electronics and technology | |
| 504 | |a Includes bibliographical references and index. | ||
| 505 | 0 | |a Forword; Dedication; Preface; Contents; Chapter 1 BSIM and IC Simulation; 1.1 Circuit Simulation and Compact Models; 1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 Looking Towards the Future -- The Multi-Gate MOSFET Model; 1.9 The Intent of This Book; References; Chapter 2 Fundamental MOSFET Physical Effects and Their Models for BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate and Channel Geometries and Materials. | |
| 505 | 8 | |a 2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card and Parameter Binning; 2.2.3 Gate Stack and Substrate Material Model Options; 2.3 Temperature-Dependence Model Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence; 2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion; 2.6 Bulk-Charge Effects. | |
| 505 | 8 | |a 2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 Effective Mobility; 2.10 Layout-Dependent Effects: Mechanical Stress and Proximity Effects; 2.11 Chapter Summary; 2.12 Parameter Table; References; Chapter 3 Channel DC Current and Output Resistance; 3.1 Introduction and Chapter Objectives; 3.2 Channel Current Theory; 3.3 Single Continuous Channel Charge Model; 3.4 Channel Current in Subthreshold and Linear Operations; 3.5 Velocity Saturation and Velocity Overshoot; 3.6 Output Resistance in Saturation Region; 3.6.1 CLM: Channel Length Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering. | |
| 505 | 8 | |a 3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced Body-Bias Effect; 3.6.5 Channel Current Model for All Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 Chapter Summary; 3.9 Parameter Table; References; Chapter 4 Gate Direct-Tunneling and Body Currents; 4.1 Introduction and Chapter Objectives; 4.2 Gate Direct-Tunneling Current Theory and Model; 4.2.1 Tunneling Mechanisms and Current Components; 4.2.2 Gate Oxide Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate-Source/Drain Tunneling Through Overlap Regions. | |
| 505 | 8 | |a 4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The Non-Zero Vds Scenario; 4.2.6 Characterization and Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 Chapter Summary; 4.6 Parameter Table; References; Chapter 5 Charge and Capacitance Models; 5.1 Introduction and Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 Intrinsic Charge and Capacitance Models; 5.3.1 Charge-Thickness Model (CTM). | |
| 520 | |a This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emphasis is placed on how the BSIM model evolved into the first ever industry standard SPICE MOSFET model for circuit simulation and CMOS technology development. The discussion covers the theory and methodology of how a MOSFET model, or semiconductor device models in general, can be implemented to be ro. | ||
| 650 | 0 | |a Metal oxide semiconductor field-effect transistors |x Computer simulation. | |
| 650 | 0 | |a Electronic circuit design |x Data processing. |0 http://id.loc.gov/authorities/subjects/sh85042278 | |
| 650 | 6 | |a Transistors MOSFET |x Simulation par ordinateur. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Electronics |x Transistors. |2 bisacsh | |
| 650 | 7 | |a Electronic circuit design |x Data processing |2 fast | |
| 650 | 7 | |a Metal oxide semiconductor field-effect transistors |x Computer simulation |2 fast | |
| 700 | 1 | |a Hu, Chenming. | |
| 758 | |i has work: |a BSIM4 and MOSFET modeling for IC simulation (Text) |1 https://id.oclc.org/worldcat/entity/E39PCGjwT8DGdQrVkjGCk4PM6C |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
| 776 | 0 | 8 | |i Print version: |a Liu, Weidong, 1965- |t BSIM4 and MOSFET modeling for IC simulation. |d Singapore ; London : World Scientific, 2011 |
| 830 | 0 | |a International series on advances in solid state electronics and technology. |0 http://id.loc.gov/authorities/names/no95055036 | |
| 856 | 4 | 0 | |l FWS01 |p ZDB-4-EBA |q FWS_PDA_EBA |u https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514852 |3 Volltext |
| 938 | |a Askews and Holts Library Services |b ASKH |n AH26422341 | ||
| 938 | |a EBL - Ebook Library |b EBLB |n EBL846122 | ||
| 938 | |a ebrary |b EBRY |n ebr10529359 | ||
| 938 | |a EBSCOhost |b EBSC |n 514852 | ||
| 938 | |a ProQuest MyiLibrary Digital eBook Collection |b IDEB |n cis25731979 | ||
| 938 | |a YBP Library Services |b YANK |n 7425129 | ||
| 994 | |a 92 |b GEBAY | ||
| 912 | |a ZDB-4-EBA | ||
| 049 | |a DE-863 | ||
Datensatz im Suchindex
| DE-BY-FWS_katkey | ZDB-4-EBA-ocn785777958 |
|---|---|
| _version_ | 1816881791672254465 |
| adam_text | |
| any_adam_object | |
| author | Liu, Weidong |
| author2 | Hu, Chenming |
| author2_role | |
| author2_variant | c h ch |
| author_facet | Liu, Weidong Hu, Chenming |
| author_role | |
| author_sort | Liu, Weidong |
| author_variant | w l wl |
| building | Verbundindex |
| bvnumber | localFWS |
| callnumber-first | T - Technology |
| callnumber-label | TK7871 |
| callnumber-raw | TK7871.95 .L58 2011eb |
| callnumber-search | TK7871.95 .L58 2011eb |
| callnumber-sort | TK 47871.95 L58 42011EB |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| collection | ZDB-4-EBA |
| contents | Forword; Dedication; Preface; Contents; Chapter 1 BSIM and IC Simulation; 1.1 Circuit Simulation and Compact Models; 1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 Looking Towards the Future -- The Multi-Gate MOSFET Model; 1.9 The Intent of This Book; References; Chapter 2 Fundamental MOSFET Physical Effects and Their Models for BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate and Channel Geometries and Materials. 2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card and Parameter Binning; 2.2.3 Gate Stack and Substrate Material Model Options; 2.3 Temperature-Dependence Model Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence; 2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion; 2.6 Bulk-Charge Effects. 2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 Effective Mobility; 2.10 Layout-Dependent Effects: Mechanical Stress and Proximity Effects; 2.11 Chapter Summary; 2.12 Parameter Table; References; Chapter 3 Channel DC Current and Output Resistance; 3.1 Introduction and Chapter Objectives; 3.2 Channel Current Theory; 3.3 Single Continuous Channel Charge Model; 3.4 Channel Current in Subthreshold and Linear Operations; 3.5 Velocity Saturation and Velocity Overshoot; 3.6 Output Resistance in Saturation Region; 3.6.1 CLM: Channel Length Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering. 3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced Body-Bias Effect; 3.6.5 Channel Current Model for All Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 Chapter Summary; 3.9 Parameter Table; References; Chapter 4 Gate Direct-Tunneling and Body Currents; 4.1 Introduction and Chapter Objectives; 4.2 Gate Direct-Tunneling Current Theory and Model; 4.2.1 Tunneling Mechanisms and Current Components; 4.2.2 Gate Oxide Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate-Source/Drain Tunneling Through Overlap Regions. 4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The Non-Zero Vds Scenario; 4.2.6 Characterization and Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 Chapter Summary; 4.6 Parameter Table; References; Chapter 5 Charge and Capacitance Models; 5.1 Introduction and Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 Intrinsic Charge and Capacitance Models; 5.3.1 Charge-Thickness Model (CTM). |
| ctrlnum | (OCoLC)785777958 |
| dewey-full | 621.3815284015118 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815284015118 |
| dewey-search | 621.3815284015118 |
| dewey-sort | 3621.3815284015118 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>06638cam a2200637Ma 4500</leader><controlfield tag="001">ZDB-4-EBA-ocn785777958</controlfield><controlfield tag="003">OCoLC</controlfield><controlfield tag="005">20241004212047.0</controlfield><controlfield tag="006">m o d </controlfield><controlfield tag="007">cr cn|||||||||</controlfield><controlfield tag="008">120227s2011 si a ob 001 0 eng d</controlfield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">E7B</subfield><subfield code="b">eng</subfield><subfield code="e">pn</subfield><subfield code="c">E7B</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">CIT</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">UKMGB</subfield><subfield code="d">UIU</subfield><subfield code="d">DEBSZ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">YDXCP</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">N$T</subfield><subfield code="d">IDEBK</subfield><subfield code="d">OCLCF</subfield><subfield code="d">BWS</subfield><subfield code="d">EBLCP</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">AGLDB</subfield><subfield code="d">OTZ</subfield><subfield code="d">OCLCA</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">VTS</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">STF</subfield><subfield code="d">UKAHL</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">LEAUB</subfield><subfield code="d">AJS</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCQ</subfield><subfield code="d">OCLCO</subfield><subfield code="d">OCLCL</subfield><subfield code="d">SXB</subfield><subfield code="d">OCLCQ</subfield></datafield><datafield tag="016" ind1="7" ind2=" "><subfield code="a">015880451</subfield><subfield code="2">Uk</subfield></datafield><datafield tag="019" ind1=" " ind2=" "><subfield code="a">779937767</subfield><subfield code="a">858228012</subfield><subfield code="a">903928741</subfield><subfield code="a">994942856</subfield><subfield code="a">1063881902</subfield><subfield code="a">1086430146</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789812813992</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9812813993</subfield><subfield code="q">(electronic bk.)</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9812568638</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="z">9789812568632</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)785777958</subfield><subfield code="z">(OCoLC)779937767</subfield><subfield code="z">(OCoLC)858228012</subfield><subfield code="z">(OCoLC)903928741</subfield><subfield code="z">(OCoLC)994942856</subfield><subfield code="z">(OCoLC)1063881902</subfield><subfield code="z">(OCoLC)1086430146</subfield></datafield><datafield tag="050" ind1=" " ind2="4"><subfield code="a">TK7871.95</subfield><subfield code="b">.L58 2011eb</subfield></datafield><datafield tag="072" ind1=" " ind2="7"><subfield code="a">TEC</subfield><subfield code="x">008110</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="082" ind1="7" ind2=" "><subfield code="a">621.3815284015118</subfield><subfield code="2">23</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">MAIN</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Liu, Weidong.</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">BSIM4 and MOSFET modeling for IC simulation /</subfield><subfield code="c">Weidong Liu, Chenming Hu.</subfield></datafield><datafield tag="260" ind1=" " ind2=" "><subfield code="a">Singapore :</subfield><subfield code="b">World Scientific Pub. Co.,</subfield><subfield code="c">2011.</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (xix, 414 pages) :</subfield><subfield code="b">illustrations</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="a">text</subfield><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="a">computer</subfield><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="a">online resource</subfield><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="1" ind2=" "><subfield code="a">International series on advances in solid state electronics and technology</subfield></datafield><datafield tag="504" ind1=" " ind2=" "><subfield code="a">Includes bibliographical references and index.</subfield></datafield><datafield tag="505" ind1="0" ind2=" "><subfield code="a">Forword; Dedication; Preface; Contents; Chapter 1 BSIM and IC Simulation; 1.1 Circuit Simulation and Compact Models; 1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 Looking Towards the Future -- The Multi-Gate MOSFET Model; 1.9 The Intent of This Book; References; Chapter 2 Fundamental MOSFET Physical Effects and Their Models for BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate and Channel Geometries and Materials.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card and Parameter Binning; 2.2.3 Gate Stack and Substrate Material Model Options; 2.3 Temperature-Dependence Model Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence; 2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion; 2.6 Bulk-Charge Effects.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 Effective Mobility; 2.10 Layout-Dependent Effects: Mechanical Stress and Proximity Effects; 2.11 Chapter Summary; 2.12 Parameter Table; References; Chapter 3 Channel DC Current and Output Resistance; 3.1 Introduction and Chapter Objectives; 3.2 Channel Current Theory; 3.3 Single Continuous Channel Charge Model; 3.4 Channel Current in Subthreshold and Linear Operations; 3.5 Velocity Saturation and Velocity Overshoot; 3.6 Output Resistance in Saturation Region; 3.6.1 CLM: Channel Length Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced Body-Bias Effect; 3.6.5 Channel Current Model for All Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 Chapter Summary; 3.9 Parameter Table; References; Chapter 4 Gate Direct-Tunneling and Body Currents; 4.1 Introduction and Chapter Objectives; 4.2 Gate Direct-Tunneling Current Theory and Model; 4.2.1 Tunneling Mechanisms and Current Components; 4.2.2 Gate Oxide Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate-Source/Drain Tunneling Through Overlap Regions.</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The Non-Zero Vds Scenario; 4.2.6 Characterization and Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 Chapter Summary; 4.6 Parameter Table; References; Chapter 5 Charge and Capacitance Models; 5.1 Introduction and Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 Intrinsic Charge and Capacitance Models; 5.3.1 Charge-Thickness Model (CTM).</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emphasis is placed on how the BSIM model evolved into the first ever industry standard SPICE MOSFET model for circuit simulation and CMOS technology development. The discussion covers the theory and methodology of how a MOSFET model, or semiconductor device models in general, can be implemented to be ro.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Metal oxide semiconductor field-effect transistors</subfield><subfield code="x">Computer simulation.</subfield></datafield><datafield tag="650" ind1=" " ind2="0"><subfield code="a">Electronic circuit design</subfield><subfield code="x">Data processing.</subfield><subfield code="0">http://id.loc.gov/authorities/subjects/sh85042278</subfield></datafield><datafield tag="650" ind1=" " ind2="6"><subfield code="a">Transistors MOSFET</subfield><subfield code="x">Simulation par ordinateur.</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING</subfield><subfield code="x">Electronics</subfield><subfield code="x">Transistors.</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Electronic circuit design</subfield><subfield code="x">Data processing</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Metal oxide semiconductor field-effect transistors</subfield><subfield code="x">Computer simulation</subfield><subfield code="2">fast</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Hu, Chenming.</subfield></datafield><datafield tag="758" ind1=" " ind2=" "><subfield code="i">has work:</subfield><subfield code="a">BSIM4 and MOSFET modeling for IC simulation (Text)</subfield><subfield code="1">https://id.oclc.org/worldcat/entity/E39PCGjwT8DGdQrVkjGCk4PM6C</subfield><subfield code="4">https://id.oclc.org/worldcat/ontology/hasWork</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Print version:</subfield><subfield code="a">Liu, Weidong, 1965-</subfield><subfield code="t">BSIM4 and MOSFET modeling for IC simulation.</subfield><subfield code="d">Singapore ; London : World Scientific, 2011</subfield></datafield><datafield tag="830" ind1=" " ind2="0"><subfield code="a">International series on advances in solid state electronics and technology.</subfield><subfield code="0">http://id.loc.gov/authorities/names/no95055036</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="l">FWS01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FWS_PDA_EBA</subfield><subfield code="u">https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514852</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">Askews and Holts Library Services</subfield><subfield code="b">ASKH</subfield><subfield code="n">AH26422341</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">EBL - Ebook Library</subfield><subfield code="b">EBLB</subfield><subfield code="n">EBL846122</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">ebrary</subfield><subfield code="b">EBRY</subfield><subfield code="n">ebr10529359</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">EBSCOhost</subfield><subfield code="b">EBSC</subfield><subfield code="n">514852</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">ProQuest MyiLibrary Digital eBook Collection</subfield><subfield code="b">IDEB</subfield><subfield code="n">cis25731979</subfield></datafield><datafield tag="938" ind1=" " ind2=" "><subfield code="a">YBP Library Services</subfield><subfield code="b">YANK</subfield><subfield code="n">7425129</subfield></datafield><datafield tag="994" ind1=" " ind2=" "><subfield code="a">92</subfield><subfield code="b">GEBAY</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-863</subfield></datafield></record></collection> |
| id | ZDB-4-EBA-ocn785777958 |
| illustrated | Illustrated |
| indexdate | 2024-11-27T13:18:20Z |
| institution | BVB |
| isbn | 9789812813992 9812813993 |
| language | English |
| oclc_num | 785777958 |
| open_access_boolean | |
| owner | MAIN DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-863 DE-BY-FWS |
| physical | 1 online resource (xix, 414 pages) : illustrations |
| psigel | ZDB-4-EBA |
| publishDate | 2011 |
| publishDateSearch | 2011 |
| publishDateSort | 2011 |
| publisher | World Scientific Pub. Co., |
| record_format | marc |
| series | International series on advances in solid state electronics and technology. |
| series2 | International series on advances in solid state electronics and technology |
| spelling | Liu, Weidong. BSIM4 and MOSFET modeling for IC simulation / Weidong Liu, Chenming Hu. Singapore : World Scientific Pub. Co., 2011. 1 online resource (xix, 414 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier International series on advances in solid state electronics and technology Includes bibliographical references and index. Forword; Dedication; Preface; Contents; Chapter 1 BSIM and IC Simulation; 1.1 Circuit Simulation and Compact Models; 1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 Looking Towards the Future -- The Multi-Gate MOSFET Model; 1.9 The Intent of This Book; References; Chapter 2 Fundamental MOSFET Physical Effects and Their Models for BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate and Channel Geometries and Materials. 2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card and Parameter Binning; 2.2.3 Gate Stack and Substrate Material Model Options; 2.3 Temperature-Dependence Model Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence; 2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion; 2.6 Bulk-Charge Effects. 2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 Effective Mobility; 2.10 Layout-Dependent Effects: Mechanical Stress and Proximity Effects; 2.11 Chapter Summary; 2.12 Parameter Table; References; Chapter 3 Channel DC Current and Output Resistance; 3.1 Introduction and Chapter Objectives; 3.2 Channel Current Theory; 3.3 Single Continuous Channel Charge Model; 3.4 Channel Current in Subthreshold and Linear Operations; 3.5 Velocity Saturation and Velocity Overshoot; 3.6 Output Resistance in Saturation Region; 3.6.1 CLM: Channel Length Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering. 3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced Body-Bias Effect; 3.6.5 Channel Current Model for All Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 Chapter Summary; 3.9 Parameter Table; References; Chapter 4 Gate Direct-Tunneling and Body Currents; 4.1 Introduction and Chapter Objectives; 4.2 Gate Direct-Tunneling Current Theory and Model; 4.2.1 Tunneling Mechanisms and Current Components; 4.2.2 Gate Oxide Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate-Source/Drain Tunneling Through Overlap Regions. 4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The Non-Zero Vds Scenario; 4.2.6 Characterization and Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 Chapter Summary; 4.6 Parameter Table; References; Chapter 5 Charge and Capacitance Models; 5.1 Introduction and Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 Intrinsic Charge and Capacitance Models; 5.3.1 Charge-Thickness Model (CTM). This book presents the art of advanced MOSFET modeling for integrated circuit simulation and design. It provides the essential mathematical and physical analyses of all the electrical, mechanical and thermal effects in MOS transistors relevant to the operation of integrated circuits. Particular emphasis is placed on how the BSIM model evolved into the first ever industry standard SPICE MOSFET model for circuit simulation and CMOS technology development. The discussion covers the theory and methodology of how a MOSFET model, or semiconductor device models in general, can be implemented to be ro. Metal oxide semiconductor field-effect transistors Computer simulation. Electronic circuit design Data processing. http://id.loc.gov/authorities/subjects/sh85042278 Transistors MOSFET Simulation par ordinateur. TECHNOLOGY & ENGINEERING Electronics Transistors. bisacsh Electronic circuit design Data processing fast Metal oxide semiconductor field-effect transistors Computer simulation fast Hu, Chenming. has work: BSIM4 and MOSFET modeling for IC simulation (Text) https://id.oclc.org/worldcat/entity/E39PCGjwT8DGdQrVkjGCk4PM6C https://id.oclc.org/worldcat/ontology/hasWork Print version: Liu, Weidong, 1965- BSIM4 and MOSFET modeling for IC simulation. Singapore ; London : World Scientific, 2011 International series on advances in solid state electronics and technology. http://id.loc.gov/authorities/names/no95055036 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514852 Volltext |
| spellingShingle | Liu, Weidong BSIM4 and MOSFET modeling for IC simulation / International series on advances in solid state electronics and technology. Forword; Dedication; Preface; Contents; Chapter 1 BSIM and IC Simulation; 1.1 Circuit Simulation and Compact Models; 1.2 BSIM -- The Beginning; 1.3 BSIM3 -- A Compact Model Based on New MOSFET Physics; 1.4 BSIM3v3 -- World's First MOSFET Standard Model; 1.5 BSIM4 -- Aimed for 130nm Down to 20nm Nodes; 1.6 BSIM SOI; 1.7 Impact of BSIM; 1.8 Looking Towards the Future -- The Multi-Gate MOSFET Model; 1.9 The Intent of This Book; References; Chapter 2 Fundamental MOSFET Physical Effects and Their Models for BSIM4; 2.1 Introduction and Chapter Objectives; 2.2 Gate and Channel Geometries and Materials. 2.2.1 Gate and Channel Lengths and Widths2.2.2 Model Card and Parameter Binning; 2.2.3 Gate Stack and Substrate Material Model Options; 2.3 Temperature-Dependence Model Options; 2.4 Threshold Voltage; 2.4.1 Long Channel with Uniform Substrate Doping; 2.4.2 Short-Channel Effect: Vth Roll-Off and Drain Bias Effects; 2.4.3 Narrow-Width Effects; 2.4.4 Non-Uniform Substrate Doping; 2.4.4.1 Non-Uniform Vertical Doping; 2.4.4.2 Non-Uniform Lateral Doping: Pocket Implants; 2.4.5 Vth Temperature Dependence; 2.4.6 BSIM4 Vth Equation; 2.5 Poly-Silicon Gate Depletion; 2.6 Bulk-Charge Effects. 2.7 LDD Resistances2.8 Finite Charge Thickness; 2.9 Effective Mobility; 2.10 Layout-Dependent Effects: Mechanical Stress and Proximity Effects; 2.11 Chapter Summary; 2.12 Parameter Table; References; Chapter 3 Channel DC Current and Output Resistance; 3.1 Introduction and Chapter Objectives; 3.2 Channel Current Theory; 3.3 Single Continuous Channel Charge Model; 3.4 Channel Current in Subthreshold and Linear Operations; 3.5 Velocity Saturation and Velocity Overshoot; 3.6 Output Resistance in Saturation Region; 3.6.1 CLM: Channel Length Modulation; 3.6.2 DIBL: Drain-Induced Barrier Lowering. 3.6.3 DITS: Drain-Induced Threshold Voltage Shift Due to Non-Uniform Doping3.6.4 SCBE: Substrate Current Induced Body-Bias Effect; 3.6.5 Channel Current Model for All Regions of Operation; 3.7 Source-End Velocity Limit; 3.8 Chapter Summary; 3.9 Parameter Table; References; Chapter 4 Gate Direct-Tunneling and Body Currents; 4.1 Introduction and Chapter Objectives; 4.2 Gate Direct-Tunneling Current Theory and Model; 4.2.1 Tunneling Mechanisms and Current Components; 4.2.2 Gate Oxide Voltage; 4.2.3 Gate-Body Tunneling Current Igb; 4.2.4 Gate-Source/Drain Tunneling Through Overlap Regions. 4.2.5 Gate-Channel Tunneling Current4.2.5.1 Igc0: The Vds = 0 Bias Scenario; 4.2.5.2 Igcs and Igcd Partitioning: The Non-Zero Vds Scenario; 4.2.6 Characterization and Parameter Extraction; 4.3 Body Currents; 4.3.1 Impact Ionization; 4.3.2 Gate-Induced Source and Drain Leakage; 4.4 Summary of BSIM4 Branch and Terminal DC Currents; 4.5 Chapter Summary; 4.6 Parameter Table; References; Chapter 5 Charge and Capacitance Models; 5.1 Introduction and Chapter Objectives; 5.2 MOSFET Capacitance Theory; 5.3 Intrinsic Charge and Capacitance Models; 5.3.1 Charge-Thickness Model (CTM). Metal oxide semiconductor field-effect transistors Computer simulation. Electronic circuit design Data processing. http://id.loc.gov/authorities/subjects/sh85042278 Transistors MOSFET Simulation par ordinateur. TECHNOLOGY & ENGINEERING Electronics Transistors. bisacsh Electronic circuit design Data processing fast Metal oxide semiconductor field-effect transistors Computer simulation fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh85042278 |
| title | BSIM4 and MOSFET modeling for IC simulation / |
| title_auth | BSIM4 and MOSFET modeling for IC simulation / |
| title_exact_search | BSIM4 and MOSFET modeling for IC simulation / |
| title_full | BSIM4 and MOSFET modeling for IC simulation / Weidong Liu, Chenming Hu. |
| title_fullStr | BSIM4 and MOSFET modeling for IC simulation / Weidong Liu, Chenming Hu. |
| title_full_unstemmed | BSIM4 and MOSFET modeling for IC simulation / Weidong Liu, Chenming Hu. |
| title_short | BSIM4 and MOSFET modeling for IC simulation / |
| title_sort | bsim4 and mosfet modeling for ic simulation |
| topic | Metal oxide semiconductor field-effect transistors Computer simulation. Electronic circuit design Data processing. http://id.loc.gov/authorities/subjects/sh85042278 Transistors MOSFET Simulation par ordinateur. TECHNOLOGY & ENGINEERING Electronics Transistors. bisacsh Electronic circuit design Data processing fast Metal oxide semiconductor field-effect transistors Computer simulation fast |
| topic_facet | Metal oxide semiconductor field-effect transistors Computer simulation. Electronic circuit design Data processing. Transistors MOSFET Simulation par ordinateur. TECHNOLOGY & ENGINEERING Electronics Transistors. Electronic circuit design Data processing Metal oxide semiconductor field-effect transistors Computer simulation |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=514852 |
| work_keys_str_mv | AT liuweidong bsim4andmosfetmodelingforicsimulation AT huchenming bsim4andmosfetmodelingforicsimulation |