Digital clocks for synchronization and communications /:
If you need an in-depth understanding of the digital clock technologies used in building today's telecommunications networks, this authoritative and practical book is a smart choice. Providing you with critical details on the PLL (phase-locked Loop) technique for clock synchronization and gener...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Weitere Verfasser: | , |
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston :
Artech House,
©2003.
|
| Schriftenreihe: | Artech House telecommunications library.
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Zusammenfassung: | If you need an in-depth understanding of the digital clock technologies used in building today's telecommunications networks, this authoritative and practical book is a smart choice. Providing you with critical details on the PLL (phase-locked Loop) technique for clock synchronization and generation, and the DDS (direct digital synthesizer) technique for clock generation, the book helps you achieve synchronization in high-speed networks and frequency stabilization in portable equipment. |
| Beschreibung: | 1 online resource (xviii, 251 pages) : illustrations |
| Bibliographie: | Includes bibliographical references and index. |
| ISBN: | 1580537650 9781580537650 |
Internformat
MARC
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| 100 | 1 | |a Kihara, Masami. | |
| 245 | 1 | 0 | |a Digital clocks for synchronization and communications / |c Masami Kihara, Sadayasu Ono, Pekka Eskelinen. |
| 260 | |a Boston : |b Artech House, |c ©2003. | ||
| 300 | |a 1 online resource (xviii, 251 pages) : |b illustrations | ||
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| 490 | 1 | |a Artech House telecommunications library | |
| 504 | |a Includes bibliographical references and index. | ||
| 588 | 0 | |a Print version record. | |
| 520 | 3 | |a If you need an in-depth understanding of the digital clock technologies used in building today's telecommunications networks, this authoritative and practical book is a smart choice. Providing you with critical details on the PLL (phase-locked Loop) technique for clock synchronization and generation, and the DDS (direct digital synthesizer) technique for clock generation, the book helps you achieve synchronization in high-speed networks and frequency stabilization in portable equipment. |c Publisher abstract. | |
| 505 | 0 | 0 | |g 1. |t Introduction to Clocks -- |g 2. |t Basics of Clock Synchronization and Generation -- |g 3. |t Signal Processing Fundamentals -- |g 4. |t Introduction to PLLs -- |g 5. |t PLL Characteristic Analysis -- |g 6. |t Simulation of a Digital PLL -- |g 7. |t Clock Systems in Networks -- |g 8. |t Digital Synchronization system Design -- |g 9. |t Pll Lsi -- |g 10. |t Frequency Generation Systems -- |g 11. |t DDS Circuit Configuration and Characteristics -- |g 12. |t Some DDS Applications -- |g 13. |t Noise in Clocks -- |g 14. |t Noise Measurement -- |g 15. |t Operational and Environmental Effects on Performance Characteristics -- |g App. |t Units Related to PLL Design. |
| 650 | 0 | |a Timing circuits. |0 http://id.loc.gov/authorities/subjects/sh85135453 | |
| 650 | 0 | |a Synchronization. |0 http://id.loc.gov/authorities/subjects/sh85131609 | |
| 650 | 0 | |a Telecommunication systems |x Equipment and supplies. | |
| 650 | 0 | |a Automatic timers. |0 http://id.loc.gov/authorities/subjects/sh85010113 | |
| 650 | 6 | |a Minuteries. | |
| 650 | 6 | |a Synchronisation. | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING |x Mining. |2 bisacsh | |
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| 650 | 7 | |a Synchronization |2 fast | |
| 650 | 7 | |a Telecommunication systems |x Equipment and supplies |2 fast | |
| 650 | 7 | |a Timing circuits |2 fast | |
| 700 | 1 | |a Ono, Sadayasu. | |
| 700 | 1 | |a Eskelinen, Pekka. | |
| 758 | |i has work: |a Digital clocks for synchronization and communications (Text) |1 https://id.oclc.org/worldcat/entity/E39PCXxYXPwp4RpvJG6vY3rxgq |4 https://id.oclc.org/worldcat/ontology/hasWork | ||
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Datensatz im Suchindex
| DE-BY-FWS_katkey | ZDB-4-EBA-ocm52751859 |
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| _version_ | 1816881609337470976 |
| adam_text | |
| any_adam_object | |
| author | Kihara, Masami |
| author2 | Ono, Sadayasu Eskelinen, Pekka |
| author2_role | |
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| author_facet | Kihara, Masami Ono, Sadayasu Eskelinen, Pekka |
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| callnumber-subject | TK - Electrical and Nuclear Engineering |
| collection | ZDB-4-EBA |
| contents | Introduction to Clocks -- Basics of Clock Synchronization and Generation -- Signal Processing Fundamentals -- Introduction to PLLs -- PLL Characteristic Analysis -- Simulation of a Digital PLL -- Clock Systems in Networks -- Digital Synchronization system Design -- Pll Lsi -- Frequency Generation Systems -- DDS Circuit Configuration and Characteristics -- Some DDS Applications -- Noise in Clocks -- Noise Measurement -- Operational and Environmental Effects on Performance Characteristics -- Units Related to PLL Design. |
| ctrlnum | (OCoLC)52751859 |
| dewey-full | 622.382 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 622 - Mining and related operations |
| dewey-raw | 622.382 |
| dewey-search | 622.382 |
| dewey-sort | 3622.382 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Bergbau / Hüttenwesen |
| format | Electronic eBook |
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| id | ZDB-4-EBA-ocm52751859 |
| illustrated | Illustrated |
| indexdate | 2024-11-27T13:15:26Z |
| institution | BVB |
| isbn | 1580537650 9781580537650 |
| language | English |
| oclc_num | 52751859 |
| open_access_boolean | |
| owner | MAIN DE-863 DE-BY-FWS |
| owner_facet | MAIN DE-863 DE-BY-FWS |
| physical | 1 online resource (xviii, 251 pages) : illustrations |
| psigel | ZDB-4-EBA |
| publishDate | 2003 |
| publishDateSearch | 2003 |
| publishDateSort | 2003 |
| publisher | Artech House, |
| record_format | marc |
| series | Artech House telecommunications library. |
| series2 | Artech House telecommunications library |
| spelling | Kihara, Masami. Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. Boston : Artech House, ©2003. 1 online resource (xviii, 251 pages) : illustrations text txt rdacontent computer c rdamedia online resource cr rdacarrier Artech House telecommunications library Includes bibliographical references and index. Print version record. If you need an in-depth understanding of the digital clock technologies used in building today's telecommunications networks, this authoritative and practical book is a smart choice. Providing you with critical details on the PLL (phase-locked Loop) technique for clock synchronization and generation, and the DDS (direct digital synthesizer) technique for clock generation, the book helps you achieve synchronization in high-speed networks and frequency stabilization in portable equipment. Publisher abstract. 1. Introduction to Clocks -- 2. Basics of Clock Synchronization and Generation -- 3. Signal Processing Fundamentals -- 4. Introduction to PLLs -- 5. PLL Characteristic Analysis -- 6. Simulation of a Digital PLL -- 7. Clock Systems in Networks -- 8. Digital Synchronization system Design -- 9. Pll Lsi -- 10. Frequency Generation Systems -- 11. DDS Circuit Configuration and Characteristics -- 12. Some DDS Applications -- 13. Noise in Clocks -- 14. Noise Measurement -- 15. Operational and Environmental Effects on Performance Characteristics -- App. Units Related to PLL Design. Timing circuits. http://id.loc.gov/authorities/subjects/sh85135453 Synchronization. http://id.loc.gov/authorities/subjects/sh85131609 Telecommunication systems Equipment and supplies. Automatic timers. http://id.loc.gov/authorities/subjects/sh85010113 Minuteries. Synchronisation. TECHNOLOGY & ENGINEERING Mining. bisacsh Automatic timers fast Synchronization fast Telecommunication systems Equipment and supplies fast Timing circuits fast Ono, Sadayasu. Eskelinen, Pekka. has work: Digital clocks for synchronization and communications (Text) https://id.oclc.org/worldcat/entity/E39PCXxYXPwp4RpvJG6vY3rxgq https://id.oclc.org/worldcat/ontology/hasWork Print version: Kihara, Masami. Digital clocks for synchronization and communications. Boston : Artech House, ©2003 1580535062 (DLC) 2002032670 (OCoLC)50434300 Artech House telecommunications library. http://id.loc.gov/authorities/names/n42002466 FWS01 ZDB-4-EBA FWS_PDA_EBA https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=87744 Volltext |
| spellingShingle | Kihara, Masami Digital clocks for synchronization and communications / Artech House telecommunications library. Introduction to Clocks -- Basics of Clock Synchronization and Generation -- Signal Processing Fundamentals -- Introduction to PLLs -- PLL Characteristic Analysis -- Simulation of a Digital PLL -- Clock Systems in Networks -- Digital Synchronization system Design -- Pll Lsi -- Frequency Generation Systems -- DDS Circuit Configuration and Characteristics -- Some DDS Applications -- Noise in Clocks -- Noise Measurement -- Operational and Environmental Effects on Performance Characteristics -- Units Related to PLL Design. Timing circuits. http://id.loc.gov/authorities/subjects/sh85135453 Synchronization. http://id.loc.gov/authorities/subjects/sh85131609 Telecommunication systems Equipment and supplies. Automatic timers. http://id.loc.gov/authorities/subjects/sh85010113 Minuteries. Synchronisation. TECHNOLOGY & ENGINEERING Mining. bisacsh Automatic timers fast Synchronization fast Telecommunication systems Equipment and supplies fast Timing circuits fast |
| subject_GND | http://id.loc.gov/authorities/subjects/sh85135453 http://id.loc.gov/authorities/subjects/sh85131609 http://id.loc.gov/authorities/subjects/sh85010113 |
| title | Digital clocks for synchronization and communications / |
| title_alt | Introduction to Clocks -- Basics of Clock Synchronization and Generation -- Signal Processing Fundamentals -- Introduction to PLLs -- PLL Characteristic Analysis -- Simulation of a Digital PLL -- Clock Systems in Networks -- Digital Synchronization system Design -- Pll Lsi -- Frequency Generation Systems -- DDS Circuit Configuration and Characteristics -- Some DDS Applications -- Noise in Clocks -- Noise Measurement -- Operational and Environmental Effects on Performance Characteristics -- Units Related to PLL Design. |
| title_auth | Digital clocks for synchronization and communications / |
| title_exact_search | Digital clocks for synchronization and communications / |
| title_full | Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. |
| title_fullStr | Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. |
| title_full_unstemmed | Digital clocks for synchronization and communications / Masami Kihara, Sadayasu Ono, Pekka Eskelinen. |
| title_short | Digital clocks for synchronization and communications / |
| title_sort | digital clocks for synchronization and communications |
| topic | Timing circuits. http://id.loc.gov/authorities/subjects/sh85135453 Synchronization. http://id.loc.gov/authorities/subjects/sh85131609 Telecommunication systems Equipment and supplies. Automatic timers. http://id.loc.gov/authorities/subjects/sh85010113 Minuteries. Synchronisation. TECHNOLOGY & ENGINEERING Mining. bisacsh Automatic timers fast Synchronization fast Telecommunication systems Equipment and supplies fast Timing circuits fast |
| topic_facet | Timing circuits. Synchronization. Telecommunication systems Equipment and supplies. Automatic timers. Minuteries. Synchronisation. TECHNOLOGY & ENGINEERING Mining. Automatic timers Synchronization Telecommunication systems Equipment and supplies Timing circuits |
| url | https://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&AN=87744 |
| work_keys_str_mv | AT kiharamasami digitalclocksforsynchronizationandcommunications AT onosadayasu digitalclocksforsynchronizationandcommunications AT eskelinenpekka digitalclocksforsynchronizationandcommunications |