Getting started with FPGAs: digital circuit design, VERILOG, and VHDL for beginners
Saved in:
| Main Author: | |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
San Francisco
No Starch Press
2023
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| Subjects: | |
| Physical Description: | xxiii, 283 Seiten Illustrationen |
| ISBN: | 9781718502949 |
Staff View
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV049424038 | ||
| 003 | DE-604 | ||
| 005 | 20231207 | ||
| 007 | t | ||
| 008 | 231121s2023 a||| |||| 00||| eng d | ||
| 020 | |a 9781718502949 |9 978-1-7185-0294-9 | ||
| 035 | |a (OCoLC)1414555569 | ||
| 035 | |a (DE-599)BVBBV049424038 | ||
| 040 | |a DE-604 |b ger |e rda | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-Aug4 | ||
| 084 | |a ZN 4940 |0 (DE-625)157423: |2 rvk | ||
| 100 | 1 | |a Merrick, Russell |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Getting started with FPGAs |b digital circuit design, VERILOG, and VHDL for beginners |c by Russell Merrick |
| 264 | 1 | |a San Francisco |b No Starch Press |c 2023 | |
| 300 | |a xxiii, 283 Seiten |b Illustrationen | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VHDL |0 (DE-588)4254792-1 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a VHDL |0 (DE-588)4254792-1 |D s |
| 689 | 1 | |5 DE-604 | |
| 689 | 2 | 0 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 2 | |5 DE-604 | |
| 776 | 1 | |a 978-1-7185-0295-6 | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-034751488 | |
Record in the Search Index
| _version_ | 1814902728463220736 |
|---|---|
| adam_text | |
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author | Merrick, Russell |
| author_facet | Merrick, Russell |
| author_role | aut |
| author_sort | Merrick, Russell |
| author_variant | r m rm |
| building | Verbundindex |
| bvnumber | BV049424038 |
| classification_rvk | ZN 4940 |
| ctrlnum | (OCoLC)1414555569 (DE-599)BVBBV049424038 |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>00000nam a2200000 c 4500</leader><controlfield tag="001">BV049424038</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20231207</controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">231121s2023 a||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781718502949</subfield><subfield code="9">978-1-7185-0294-9</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1414555569</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV049424038</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-Aug4</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4940</subfield><subfield code="0">(DE-625)157423:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Merrick, Russell</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Getting started with FPGAs</subfield><subfield code="b">digital circuit design, VERILOG, and VHDL for beginners</subfield><subfield code="c">by Russell Merrick</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">San Francisco</subfield><subfield code="b">No Starch Press</subfield><subfield code="c">2023</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">xxiii, 283 Seiten</subfield><subfield code="b">Illustrationen</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">VHDL</subfield><subfield code="0">(DE-588)4254792-1</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="2" ind2="0"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="2" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="1" ind2=" "><subfield code="a">978-1-7185-0295-6</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-034751488</subfield></datafield></record></collection> |
| id | DE-604.BV049424038 |
| illustrated | Illustrated |
| index_date | 2024-07-03T23:08:29Z |
| indexdate | 2024-11-05T17:01:58Z |
| institution | BVB |
| isbn | 9781718502949 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-034751488 |
| oclc_num | 1414555569 |
| open_access_boolean | |
| owner | DE-Aug4 |
| owner_facet | DE-Aug4 |
| physical | xxiii, 283 Seiten Illustrationen |
| publishDate | 2023 |
| publishDateSearch | 2023 |
| publishDateSort | 2023 |
| publisher | No Starch Press |
| record_format | marc |
| spelling | Merrick, Russell Verfasser aut Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners by Russell Merrick San Francisco No Starch Press 2023 xxiii, 283 Seiten Illustrationen txt rdacontent n rdamedia nc rdacarrier Field programmable gate array (DE-588)4347749-5 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf VHDL (DE-588)4254792-1 gnd rswk-swf Field programmable gate array (DE-588)4347749-5 s DE-604 VHDL (DE-588)4254792-1 s VERILOG (DE-588)4268385-3 s 978-1-7185-0295-6 |
| spellingShingle | Merrick, Russell Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners Field programmable gate array (DE-588)4347749-5 gnd VERILOG (DE-588)4268385-3 gnd VHDL (DE-588)4254792-1 gnd |
| subject_GND | (DE-588)4347749-5 (DE-588)4268385-3 (DE-588)4254792-1 |
| title | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners |
| title_auth | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners |
| title_exact_search | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners |
| title_exact_search_txtP | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners |
| title_full | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners by Russell Merrick |
| title_fullStr | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners by Russell Merrick |
| title_full_unstemmed | Getting started with FPGAs digital circuit design, VERILOG, and VHDL for beginners by Russell Merrick |
| title_short | Getting started with FPGAs |
| title_sort | getting started with fpgas digital circuit design verilog and vhdl for beginners |
| title_sub | digital circuit design, VERILOG, and VHDL for beginners |
| topic | Field programmable gate array (DE-588)4347749-5 gnd VERILOG (DE-588)4268385-3 gnd VHDL (DE-588)4254792-1 gnd |
| topic_facet | Field programmable gate array VERILOG VHDL |
| work_keys_str_mv | AT merrickrussell gettingstartedwithfpgasdigitalcircuitdesignverilogandvhdlforbeginners |