APA (7th ed.) Citation

Tripathi, S. L., Saxena, S., Sinha, S. K., & Patel, G. S. (2022). Digital VLSI Design and Simulation with Verilog (1st edition.). Wiley.

Chicago Style (17th ed.) Citation

Tripathi, Suman Lata, Sobhit Saxena, Sanjeet Kumar Sinha, and Govind Singh Patel. Digital VLSI Design and Simulation with Verilog. 1st edition. Hoboken: Wiley, 2022.

MLA (9th ed.) Citation

Tripathi, Suman Lata, et al. Digital VLSI Design and Simulation with Verilog. 1st edition. Wiley, 2022.

Warning: These citations may not always be 100% accurate.