Microelectronic circuits:
Devices and basic circuits -- Signals and amplifiers -- Operational amplifiers -- Semiconductors -- Diodes -- Mos field-effect transistors (MOSFETS) -- Bipolar junction transistors (BJTS) -- Transistor amplifiers -- Analog integrated circuits -- Building blocks of integrated-circuit amplifiers -- Di...
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| Sprache: | English |
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New York, NY ; Oxford
Oxford University Press
[2021]
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| Ausgabe: | International eighth edition |
| Schriftenreihe: | The Oxford series in electrical and computer engineering
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| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis |
| Zusammenfassung: | Devices and basic circuits -- Signals and amplifiers -- Operational amplifiers -- Semiconductors -- Diodes -- Mos field-effect transistors (MOSFETS) -- Bipolar junction transistors (BJTS) -- Transistor amplifiers -- Analog integrated circuits -- Building blocks of integrated-circuit amplifiers -- Differential and multistage amplifiers -- Frequency response -- Feedback -- Output stages and power amplifiers -- Operational amplifier circuits -- Filters -- Oscillators -- Digital integrated circuits -- Cmos digital logic circuits -- Digital Design: Power, Speed, and Area -- Memory and Clocking Circuits -- Appendices |
| Beschreibung: | xxviii, 1212 Seiten, 24 verschieden gezählte Seiten Diagramme |
| ISBN: | 9780190853501 |
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MARC
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| 245 | 1 | 0 | |a Microelectronic circuits |c Adel S. Sedra (University of Waterloo), Kenneth C. Smith (University of Toronto), Tony Chan Carusone (University of Toronto), Vincent Gaudet (University of Waterloo) |
| 250 | |a International eighth edition | ||
| 264 | 1 | |a New York, NY ; Oxford |b Oxford University Press |c [2021] | |
| 300 | |a xxviii, 1212 Seiten, 24 verschieden gezählte Seiten |b Diagramme | ||
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| 338 | |b nc |2 rdacarrier | ||
| 490 | 0 | |a The Oxford series in electrical and computer engineering | |
| 520 | 3 | |a Devices and basic circuits -- Signals and amplifiers -- Operational amplifiers -- Semiconductors -- Diodes -- Mos field-effect transistors (MOSFETS) -- Bipolar junction transistors (BJTS) -- Transistor amplifiers -- Analog integrated circuits -- Building blocks of integrated-circuit amplifiers -- Differential and multistage amplifiers -- Frequency response -- Feedback -- Output stages and power amplifiers -- Operational amplifier circuits -- Filters -- Oscillators -- Digital integrated circuits -- Cmos digital logic circuits -- Digital Design: Power, Speed, and Area -- Memory and Clocking Circuits -- Appendices | |
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| 856 | 4 | 2 | |m Digitalisierung UB Passau - ADAM Catalogue Enrichment |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=032900700&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
Datensatz im Suchindex
| DE-BY-862_location | 2000 |
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| DE-BY-FWS_katkey | 924150 |
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CONTENTS Tables xiv Historical Notes xv Preface xvii part I DEVICES AND BASIC CIRCUITS 2 1 Signals, Amplifiers, and Semiconductors 4 Introduction 5 1.1 Signals 6 1.2 Frequency Spectrum of Signals 8 1.3 Analog and Digital Signals 11 1.4 Amplifiers 15 1.4.1 Signal Amplification 15 1.4.2 Amplifier Circuit Symbol 16 1.4.3 Voltage Gain 16 1.4.4 Power Gain and Current Gain 17 1.4.5 Expressing Gain in Decibels 17 1.4.6 The Amplifier Power Supplies 18 1.4.7 Amplifier Saturation 20 1.4.8 Symbol Convention 20 1.5 Circuit Models for Amplifiers 22 1.5.1 Voltage Amplifiers 23 1.5.2 Cascaded Amplifiers 25 1.5.3 Other Amplifier Types 27 1.5.4 Relationships between the Four Amplifier Models 27 1.5.5 Determining R. and Ro 28 1.5.6 Unilateral Models 29 1.6 Frequency Response of Amplifiers 32 1.6.1 Measuring the Amplifier Frequency Response 32 1.6.2 Amplifier Bandwidth 33 1.6.3 Evaluating the Frequency Response of Amplifiers 33 1.6.4 Single-Time-Constant Networks 34 1.6.5 Classification of Amplifiers Based on Frequency Response 40 1.7 Intrinsic Semiconductors 42 1.8 Doped Semiconductors 45 1.9 Current Flow in Semiconductors 48 1.9.1 Drift Current 48 1.9.2 Diffusion Current 51 1.9.3 Relationship between D and μ 54 1.10 The pn Junction 54 1.10.1 Physical Structure 55 1.10.2 Operation with Open-Circuit Terminals 55 1.11 The pn Junction with an Applied Voltage 62 1.11.1 Qualitative Description of Junction Operation 62 1.11.2 The Current-Voltage Relationship of the Junction 64 1.11.3 Reverse Breakdown 69 1.12 Capacitive Effects in the pn Junction 70 1.12.1 Depletion or Junction Capacitance 70
1.12.2 Diffusion Capacitance 72 Summary 73 Problems 75 2 Operational Amplifiers 90 Introduction 91 2.1 The Ideal Op Amp 91 2.1.1 The Op-Amp Terminals 91 2.1.2 Function and Characteristics of the Ideal Op Amp 92 2.1.3 Differential and Common-Mode Signals 94 2.2 The Inverting Configuration 96 2.2.1 The Closed-Loop Gain 96 2.2.2 Effect of Finite Open-Loop Gain 98 2.2.3 Input and Output Resistances 100 2.2.4 An Important Application: The Weighted Summer 103 2.3 The Noninverting Configuration 105 2.3.1 The Closed-Loop Gain 105
Contents 2.3.2 Effect of Finite Open-Loop Gain 107 2.3.3 Input and Output Resistance 107 2.3.4 The Voltage Follower 108 2.4 Difference Amplifiers 109 2.4.1 A Single-Op-Amp Difference Amplifier 110 2.4.2 A Superior Circuit: The Instrumentation Amplifier 114 2.5 Integrators and Differentiators 118 2.5.1 The Inverting Configuration with General Impedances 119 2.5.2 The Inverting Integrator 121 2.5.3 The Op-Amp Differentiator 126 2.6 DC Imperfections 128 2.6.1 Offset Voltage 128 2.6.2 Input Bias and Offset Currents 132 2.6.3 Effect of Vos and Ios on the Operation of the Inverting Integrator 135 2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance 136 2.7.1 Frequency Dependence of the Open-Loop Gain 136 2.7.2 Frequency Response of Closed-Loop Amplifiers 139 2.8 Large-Signal Operation of Op Amps 141 2.8.1 Output Voltage Saturation 142 2.8.2 Output Current Limits 142 2.8.3 Slew Rate 143 ■ Summary 147 Problems 148 3 Diodes 166 Introduction 167 3.1 The Ideal Diode 167 3.1.1 Current-Voltage Characteristic 167 3.1.2 The Rectifier 169 3.1.3 Limiting and Protection Circuits 172 3.2 Terminal Characteristics of Junction Diodes 175 3.2.1 The Forward-Bias Region 175 3.2.2 The Reverse-Bias Region 180 3.2.3 The Breakdown Region 180 3.3 Modeling the Diode 181 3.3.1 The Exponential Model 181 3.3.2 Graphical Analysis Using the Exponential Model 181 3.3.3 Iterative Analysis Using the Exponential Model 182 3.3.4 The Need for Rapid Analysis 183 3.3.5 The Constant-Voltage-Drop Model 183 3.3.6 The Ideal-Diode Model 184 3.3.7 Operation in the Reverse Breakdown Region 186 3.4 The
Small-Signal Model 187 3.5 Voltage Regulation 192 3.6 Rectifier Circuits 197 3.6.1 The Half-Wave Rectifier 198 3.6.2 The Full-Wave Rectifier 200 3.6.3 The Bridge Rectifier 201 3.6.4 The Rectifier with a Filter Capacitor—The Peak Rectifier 203 3.6.5 Precision Half-Wave Rectifier—The Superdiode 210 3.7 Other Diode Applications 211 3.7.1 The Clamped Capacitor and Bootstrapping 212 3.7.2 The Voltage Doubler 213 3.7.3 Varactors 214 3.7.4 Photodiodes 214 3.7.5 Light-Emitting Diodes (LEDs) 216 Summary 218 Problems 219 4 Bipolar Junction Transistors (BJTs) 232 Introduction 233 4.1 Device Structure and Physical Operation 233 4.1.1 Simplified Structure and Modes of Operation 233 4.1.2 Operation of the npn Transistor in the Active Mode 235 4.1.3 Structure of Actual Transistors 243 4.1.4 Operation in the Saturation Mode 243 4.1.5 The pnp Transistor 245 4.2 Current-Voltage Characteristics 247 4.2.1 Circuit Symbols and Conventions 247 4.2.2 Graphical Representation of Transistor Characteristics 252 4.2.3 Dependence of ic on the Collector Voltage—The Early Effect 253 4.2.4 An Alternative Form of the CommonEmitter Characteristics 256 4.3 BIT Circuits at DC 260 4.4 Transistor Breakdown and Temperature Effects 278 4.4.1 Transistor Breakdown 278 vii
viii Contents 4.4.2 Dependence of ß on Ic and Temperature 280 Summary 281 Problems 281 5 MOS Field-Effect Transistors (MOSFETs) 292 Introduction 293 5.1 Device Structure and Physical Operation 294 5.1.1 Device Structure 294 5.1.2 Operation with Zero Gate Voltage 296 5.1.3 Creating a Channel for Current Flow 296 5.1.4 Applying a Small vDS 298 5.1.5 Operation as vDS Is Increased 301 5.1.6 Operation for vDS vov: Channel PinchOff and Current Saturation 302 5.1.7 The p-Channel MOSFET 306 5.1.8 Complementary MOS or CMOS 308 5.2 Current-Voltage Characteristics 309 5.2.1 Circuit Symbol 309 5.2.2 The iD-vDS Characteristics 310 5.2.3 The iD-vas Characteristic 311 5.2.4 Finite Output Resistance in Saturation 315 5.2.5 Characteristics of the p-Channel MOSFET 318 5.3 MOSFET Circuits at DC 320 5.4 Technology Scaling (Moore’s Law) and Other Topics 331 5.4.1 Technology Scaling 331 5.4.2 Subthreshold Conduction and Leakage Currents 334 5.4.3 The Role of the Substrate—The Body Effect 335 5.4.4 Temperature Effects 336 5.4.5 Breakdown and Input Protection 336 5.4.6 The Depletion-Type MOSFET 337 Summary 338 Problems 339 . * 6 Transistor Amplifiers 6.1.5 The Small-Signal Voltage Gain 357 6.1.6 Determining the VTC by Graphical Analysis 363 6.1.7 Deciding on a Location for the Bias Point Q 365 6.2 Small-Signal Operation and Models 365 6.2.1 The MOSFET Case 366 6.2.2 The BJT Case 381 6.2.3 Summary Tables 401 6.3 Basic Configurations 402 6.3.1 The Three Basic Configurations 402 6.3.2 Characterizing Amplifiers 403 6.3.3 The Common-Source (CS) and Common-Emitter (CE) Amplifiers 405 6.3.4 The Common-
Source (CommonEmitter) Amplifier with a Source (Emitter) Resistance 411 6.3.5 The Common-Gate (CG) and the Common-Base (CB) Amplifiers 418 6.3.6 The Source and Emitter Followers 421 6.3.7 Summary Tables and Comparisons 431 6.3.8 When and How to Include the Output Resistance r0 431 6.4 Biasing 432 6.4.1 The MOSFET Case 433 6.4.2 The BJT Case 439 6.5 Discrete-Circuit Amplifiers 444 6.5.1 A Common-Source (CS) Amplifier 445 6.5.2 A Common-Emitter Amplifier 447 6.5.3 A Common-Emitter Amplifier with an Emitter Resistance Re 449 6.5.4 A Common-Base (CB) Amplifier 451 6.5.5 An Emitter Follower 452 6.5.6 The Amplifier Frequency Response 454 Summary 455 Problems 456 350 Introduction 351 6.1 Basic Principles 351 6.1.1 The Basis for Amplifier Operation 351 6.1.2 Obtaining a Voltage Amplifier 352 6.1.3 The Voltage-Transfer Characteristic (VTC) 354 6.1.4 Obtaining Linear Amplification by Biasing the Transistor 355 part и ANALOG INTEGRATED CIRCUITS 479 7 Building Blocks of IntegratedCircuit Amplifiers 481 Introduction 482 7.1 IC Design Philosophy 482
Contents 7.2 IC Biasing: Current Sources and Current Mirrors 484 7.2.1 The Basic MOSFET Current Source 484 7.2.2 The MOS Current Mirror 485 7.2.3 MOS Current-Steering Circuits 488 7.2.4 BJT Circuits 490 7.2.5 Small-Signal Operation of Current Mirrors 495 7.3 The Basic Gain Cell 498 7.3.1 The CS and CE Amplifiers with Current-Source Loads 498 7.3.2 The Intrinsic Gain 499 7.3.3 Effect of the Output Resistance of the Current-Source Load 502 7.3.4 Increasing the Gain of the Basic Cell 506 7.4 The Common-Gate and Common-Base Amplifiers as Current Buffers 508 7.4.1 The CG Circuit 508 7.4.2 Output Resistance of a CS Amplifier with a Source Resistance 512 7.4.3 The Body Effect in the CG Amplifier 513 7.4.4 The CB Circuit 514 7.4.5 Output Resistance of the EmitterDegenerated CE Amplifier 517 7.5 The Cascode Amplifier 518 7.5.1 The MOS Cascode Amplifier 518 7.5.2 Distribution of Voltage Gain in a Cascode Amplifier 523 7.5.3 The BJT Cascode 525 7.6 The IC Source Follower 527 7.7 Current-Mirror Circuits with Improved Performance 529 7.7.1 The Cascode MOS Mirror 530 7.7.2 The Wilson BJT Current Mirror 531 7.7.3 The Wilson MOS Mirror 534 7.7.4 The Widlar Current Source 536 Summary 538 Problems 539 8 Differential and Multistage Amplifiers 553 Introduction 554 8.1 The MOS Differential Pair 554 8.1.1 Operation with a Common-Mode Input Voltage 555 8.1.2 Operation with a Differential Input Voltage 560 8.1.3 Large-Signal Operation 561 8.1.4 Small-Signal Operation 565 8.1.5 The Differential Amplifier with Current-Source Loads 570 8.1.6 Cascode Differential Amplifier 571 8.2 The BJT Differential
Pair 573 8.2.1 Basic Operation 573 8.2.2 Input Common-Mode Range 575 8.2.3 Large-Signal Operation 576 8.2.4 Small-Signal Operation 579 8.3 Common-Mode Rejection 586 8.3.1 The MOS Case 586 8.3.2 The BJT Case 592 8.4 DC Offset 595 8.4.1 Input Offset Voltage of the MOS Differential Amplifier 595 8.4.2 Input Offset Voltage of the Bipolar Differential Amplifier 599 8.4.3 Input Bias and Offset Currents of the Bipolar Differential Amplifier 601 8.4.4 A Concluding Remark 602 8.5 The Differential Amplifier with a CurrentMirror Load 602 8.5.1 Differential-to-Single-Ended Conversion 603 8.5.2 The Current-Mirror-Loaded MOS Differential Pair 603 8.5.3 Differential Gain of the CurrentMirror-Loaded MOS Pair 606 8.5.4 The Bipolar Differential Pair with a Current-Mirror Load 610 8.5.5 Common-Mode Gain and CMRR 612 8.6 Multistage Amplifiers 615 8.6.1 A Two-Stage CMOS Op Amp 616 8.6.2 A Bipolar Op Amp 620 Summary 629 Problems 630 9 Frequency Response 649 Introduction 650 9.1 High-Frequency Transistor Models 651 9.1.1 The MOSFET 652 9.1.2 The BJT 656 9.2 High-Frequency Response of CS and CE Amplifiers 661 9.2.1 Frequency Response of the Low-Pass Single-Time-Constant Circuit 661 9.2.2 The Common-Source Amplifier 662 9.2.3 Frequency Response of the CS Amplifier When Rsig Is Low 667 ix
X Contents 9.2.4 The Common-Emitter Amplifier 671 9.2.5 Miller’s Theorem 675 9.3 The Method of Open-Circuit Time Constants 679 9.3.1 The High-Frequency Gain Function 679 9.3.2 Determining the 3-dB Frequency fH 680 9.3.3 Applying the Method of OpenCircuit Time Constants to the CS Amplifier 681 9.3.4 Application of the Method of OpenCircuit Time Constants to the CE Amplifier 685 9.4 High-Frequency Response of Common-Gate and Cascode Amplifiers 686 9.4.1 High-Frequency Response of the CG Amplifier 686 9.4.2 High-Frequency Response of the MOS Cascode Amplifier 692 9.4.3 High-Frequency Response of the Bipolar Cascode Amplifier 697 9.5 High-Frequency Response of Source and Emitter Followers 698 9.5.1 The Source-Follower Case 699 9.5.2 The Emitter-Follower Case 705 9.6 High-Frequency Response of Differential Amplifiers 706 9.6.1 Analysis of the Resistively Loaded MOS Amplifier 706 9.6.2 Frequency Response of the CurrentMirror-Loaded MOS Differential Amplifier 711 9.7 Other Wideband Amplifier Configurations 716 9.7.1 Obtaining Wideband Amplification by Source or Emitter Degeneration 716 9.7.2 Increasing fH by Buffering the Input Signal Source 719 9.7.3 Increasing fa by Eliminating the Miller Effect Using a CG or a CB Configuration with an Input Buffer 723 9.8 Low-Frequency Response of DiscreteCircuit CS and CE Amplifiers 726 9.8.1 Frequency Response of the High-Pass Single-Time-Constant Circuit 726 9.8.2 The CS Amplifier 727 9.8.3 The Method of Short-Circuit Time Constants 734 9.8.4 The CE Amplifier 735 Summary 739 Problems 740 10 Feedback 755 Introduction 756 10.1 The General
Feedback Structure 757 10.1.1 Signal-Flow Diagram 757 10.1.2 The Closed-Loop Gain 758 10.1.3 The Loop Gain 759 10.1.4 The Ideal Case of Infinite OpenLoop Gain A 760 10.1.5 Summary 764 10.2 Some Properties of Negative Feedback 764 10.2.1 Gain Desensitivity 764 10.2.2 Bandwidth Extension 765 10.2.3 Reduction in Nonlinear Distortion 766 10.3 The Feedback Voltage Amplifier 768 10.3.1 The Series-Shunt Feedback Topology 768 10.3.2 Examples of Series-Shunt Feedback Amplifiers 769 10.3.3 Analysis of the Feedback Voltage Amplifier 771 10.3.4 A Final Remark 777 10.4 Systematic Analysis of Feedback Voltage Amplifiers 778 10.4.1 The Ideal Case 778 10.4.2 The Practical Case 780 10.5 Other Feedback-Amplifier Types 789 10.5.1 Basic Principles 789 10.5.2 The Feedback Transconductance Amplifier (Series-Series) 792 10.5.3 The Feedback Transresistance Amplifier (Shunt-Shunt) 802 10.5.4 The Feedback Current Amplifier (Shunt-Series) 809 10.6 Summary of the Feedback-Analysis Method 814 10.7 The Stability Problem 814 10.8 Effect of Feedback on the Amplifier Poles 817 10.8.1 Stability and Pole Location 817 10.8.2 Poles of the Feedback Amplifier 817 10.8.3 Amplifiers with a Single-Pole Response 818 10.8.4 Amplifiers with a Two-Pole Response 820 10.8.5 Amplifiers with Three or More Poles 822 10.9 Stability Study Using Bode Plots 824 10.9.1 Gain and Phase Margins 824 10.9.2 Effect of Phase Margin on ClosedLoop Response 825 10.9.3 An Alternative Approach for Investigating Stability 826
Contents 10.10 Frequency Compensation 829 10.10.1 Theory 829 10.10.2 Implementation 830 10.10.3 Miller Compensation and Pole Splitting 831 Summary 835 Problems 836 11 Output Stages and Power Amplifiers 857 Introduction 858 11.1 Classification of Output Stages 858 11.2 Class A Output Stage 860 11.2.1 Transfer Characteristic 860 11.2.2 Signal Waveforms 863 11.2.3 Power Dissipation 864 11.2.4 Power-Conversion Efficiency 866 11.3 Class В Output Stage 867 11.3.1 Circuit Operation 867 11.3.2 Transfer Characteristic 867 11.3.3 Power-Conversion Efficiency 868 11.3.4 Power Dissipation 869 11.4 Class AB Output Stage 872 11.4.1 Circuit Operation 872 11.4.2 Output Resistance 874 11.5 Biasing the Class AB Circuit 877 11.5.1 Biasing Using Diodes 877 11.5.2 Biasing Using the VBE Multiplier 879 11.5.3 Use of Input Emitter Followers 882 11.5.4 Use of Compound Devices 883 11.6 CMOS Output Stages 885 11.6.1 The Source Follower 886 11.6.2 An Alternative Using a CommonSource Transistor 887 11.6.3 Class D Power Amplifiers 891 11.7 Power Transistors 894 11.7.1 Packages and Heat Sinks 894 11.7.2 Power BJTs 894 11.7.3 Power MOSFETs 895 Summary 897 Problems 898 12 Operational-Amplifier Circuits 906 Introduction 907 12.1 The Two-Stage CMOS Op Amp 908 12.1.1 The Circuit 908 12.1.2 Input Common-Mode Range and Output Swing 909 12.1.3 DC Voltage Gain 910 12.1.4 Common-Mode Rejection Ratio (CMRR) 912 12.1.5 Frequency Response 913 12.1.6 Slew Rate 918 12.1.7 Power-Supply Rejection Ratio (PSRR) 919 12.1.8 Design Trade-Offs 920 12.2 The Folded-Cascode CMOS OpAmp 925 12.2.1 The Circuit 926 12.2.2 Input
Common-Mode Range and Output Swing 927 12.2.3 Voltage Gain 929 12.2.4 Frequency Response 931 12.2.5 Slew Rate 932 12.2.6 Increasing the Input CommonMode Range: Rail-to-Rail Input Operation 934 12.2.7 Increasing the Output Voltage Range: The Wide-Swing Current Mirror 935 12.3 BJT Op-Amp Techniques 937 12.3.1 Bias Design 938 12.3.2 Design of the Input Stage 939 12.3.3 Common-Mode Feedback to Control the DC Voltage at the Output of the Input Stage 946 12.3.4 The 741 Op Amp Input Stage 950 12.3.5 Output-Stage Design for Near Railto-Rail Output Swing 959 Summary 964 Problems 964 13 Filters and Oscillators 974 Introduction 975 13.1 Basic Filter Concepts 976 13.1.1 Filter Transmission 976 13.1.2 Filter Types 976 13.1.3 Filter Specification 977 13.1.4 Obtaining the Filter Transfer Function: Filter Approximation 979 13.1.5 Obtaining the Filter Circuit: Filter Realization 980 13.2 The Filter Transfer Function 981 13.2.1 The Filter Order 981 13.2.2 The Filter Poles 981 13.2.3 The Filter Transmission Zeros 982 13.2.4 All-Pole Filters 984 13.2.5 Factoring T(s) into the Product of First-Order and Second-Order Functions 985 13.2.6 First-Order Filters 986 13.2.7 Second-Order Filter Functions 988 xi
xii ^ ·· Contents 13.3 Butterworth and Chebyshev Filters 991 13.3.1 The Butterworth Filter 991 13.3.2 The Chebyshev Filter 997 13.4 Second-Order Passive Filters Based on the LCR Resonator 1000 13.4.1 The Resonator Poles 1000 13.4.2 Realization of Transmission Zeros 1001 13.4.3 Realization of the Low-Pass Function 1002 13.4.4 Realization of the Bandpass Function 1002 13.4.5 Realization of the Notch Functions 1002 13.5 Second-Order Active Filters Based on Inductance Simulation 1004 13.5.1 The Antoniou InductanceSimulation Circuit 1005 13.5.2 The Op Amp-RC Resonator 1005 13.5.3 Realization of the Various Filter Types 1007 13.6 Second-Order Active Filters Based on the Two-Integrator Loop 1011 13.6.1 Derivation of the Two-IntegratorLoop Biquad 1011 13.6.2 Circuit Implementation 1013 13.6.3 An Alternative Two-Integrator-Loop Biquad Circuit 1014 13.6.4 Final Remarks 1016 13.7 Second Order Active Filters Using a Single Op Amp 1018 13.7.1 Bandpass Circuit 1018 13.7.2 High-Pass Circuit 1020 13.7.3 Low-Pass Circuit 1021 13.8 Switched-Capacitor Filters 1023 13.8.1 The Basic Principle 1023 13.8.2 Switched-Capacitor Integrator 1024 13.8.3 Switched-Capacitor Biquad Filter 1025 13.8.4 Final Remarks 1028 13.9 Basic Principles of Sinusoidal Oscillators 1028 13.9.1 The Oscillator Feedback Loop 1028 13.9.2 The Oscillation Criterion 1029 13.9.3 Analysis of Oscillator Circuits 1030 13.9.4 Nonlinear Amplitude Control 1034 13.10 Op Amp-RC Oscillator Circuits 1036 13.10.1 The Wien-Bridge Oscillator 1036 13.10.2 The Phase-Shift Oscillator 1039 13.10.3 The Quadrature Oscillator 1041 13.10.4 The
Active-Filter-Tuned Oscillator 1042 13.10.5 A Final Remark 1044 13.11 LC and Crystal Oscillators 1044 13.11.1 The Colpitts and Hartely Oscillators 1044 13.11.2 The Cross-Coupled LC Oscillator 1048 13.11.3 Crystal Oscillators 1050 13.12 Nonlinear Oscillators or Function Generators 1052 13.12.1 The Bistable Feedback Loop 1052 13.12.2 Transfer Characteristic of the Bistable Circuit 1054 13.12.3 Triggering the Bistable Circuit 1055 13.12.4 The Bistable Circuit as a Memory Element 1055 13.12.5 A Bistable Circuit with Noninverting Transfer Characteristic 1056 13.12.6 Generating Square Waveforms Using a Bistable Circuit 1057 13.12.7 Generating Triangular Waveforms 1060 13.12.8 Generation of Sine Waves 1062 Summary 1062 Problems 1063 part ill DIGITAL INTEGRATED CIRCUITS 1076 14 CMOS Digital Logic Circuits 1078 Introduction 1079 14.1 CMOS Logic-Gate Circuits 1079 14.1.1 Switch-Level Transistor Model 1079 14.1.2 The CMOS Inverter 1079 14.1.3 General Structure of CMOS Logic 1080 14.1.4 The Two-Input NOR Gate 1084 14.1.5 The Two-Input NAND Gate 1084 14.1.6 A Complex Gate 1085 14.1.7 Obtaining the PUN from the PDN and Vice Versa 1085 14.1.8 The Exclusive-OR Function 1086 14.1.9 Summary of the Synthesis Method 1087 14.2 Digital Logic Inverters 1089 14.2.1 The Voltage-Transfer Characteristic (VTC) 1089 14.2.2 Noise Margins 1090 14.2.3 The Ideal VTC 1092
Contents 14.2.4 Inverter Implementation 1093 14.3 The CMOS Inverter 1101 14.3.1 Circuit Operation 1102 14.3.2 The Voltage-Transfer Characteristic (VTC) 1104 14.3.3 The Situation When QN and QP Are Not Matched 1107 Summary 1112 Problems 1113 15 Digital Design: Power, Speed, and Area 1117 Introduction 1118 15.1 Dynamic Operation of the CMOS Inverter 1118 15.1.1 Propagation Delay 1118 15.1.2 Determining the Propagation Delay of the CMOS Inverter 1122 15.1.3 Determining the Equivalent Load Capacitance C 1129 15.2 Transistor Sizing 1132 15.2.1 Inverter Sizing 1133 15.2.2 Transistor Sizing in CMOS Logic Gates 1135 15.2.3 Effects of Fan-In and Fan-Out on Propagation Delay 1138 15.2.4 Driving a Large Capacitance 1139 15.3 Power Dissipation 1142 15.3.1 Sources of Power Dissipation 1142 15.3.2 Power-Delay and Energy-Delay Products 1146 15.4 Implications of Technology Scaling: Issues in Deep-Submicron Design 1147 15.4.1 Silicon Area 1147 15.4.2 Scaling Implications 1147 15.4.3 Temperature, Voltage, and Process Variations 1149 15.4.4 Wiring: The Interconnect 1149 15.4.5 Digital Design in Modern Technologies 1150 Summary 1151 Problems 1153 16 Memory and Clocking Circuits 1159 Introduction 1160 16.1 The Transmission Gate 16.1.1 Operation with NMOS Transistors as Switches 1161 16.1.2 Restoring the Value of V0H to VDD 1165 16.1.3 The Use of CMOS Transmission Gates as Switches 1166 16.2 Latches and Flip-Flops 1172 16.2.1 The Latch 1172 16.2.2 The SR Flip-Flop 1174 16.2.3 CMOS Implementation of SR FlipFlops 1175 16.2.4 A Simpler CMOS Implementation of the Clocked SR Flip-Flop 1180 16.2.5 D
Flip-Flop Circuits 1180 16.3 Random-Access Memory (RAM) Cells 1183 16.3.1 Static Memory (SRAM) Cell 1185 16.3.2 Dynamic Memory (DRAM) Cell 1192 16.3.3 Flash Memory 1194 16.4 Ring Oscillators and Special-Purpose Circuits 1196 16.4.1 Ring Oscillators and Other PulseGeneration Circuits 1196 16.4.2 The Sense Amplifier 1198 16.4.3 The Row-Address Decoder 1203 16.4.4 The Column-Address Decoder 1205 Summary 1206 Problems 1207 Appendices A. VLSI Fabrication Technology* A-1 B. SPICE Device Models and Design with Simulation Examples* B-1 C. Two-Port Network Parameters* C-1 D. Some Useful Network Theorems* D-1 E. Single-Time-Constant Circuits* E-1 F. s-Domain Analysis: Poles, Zeros, and Bode Plots* F-1 G. Comparison of the MOSFET and the BJT* G-1 H. Filter Design Material* H-1 I. Bibliography* 1-1 J. Standard Resistance Values and Unit Prefixes J-1 K. Typical Parameter Values for IC Devices Fabricated in CMOS and Bipolar Processes K-1 L. Answers to Selected Problems* L-1 Summary Tables* ST 1160 Index IN-1 Available online at www.oup.com/he/sedra-smith8xe. xiii |
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CONTENTS Tables xiv Historical Notes xv Preface xvii part I DEVICES AND BASIC CIRCUITS 2 1 Signals, Amplifiers, and Semiconductors 4 Introduction 5 1.1 Signals 6 1.2 Frequency Spectrum of Signals 8 1.3 Analog and Digital Signals 11 1.4 Amplifiers 15 1.4.1 Signal Amplification 15 1.4.2 Amplifier Circuit Symbol 16 1.4.3 Voltage Gain 16 1.4.4 Power Gain and Current Gain 17 1.4.5 Expressing Gain in Decibels 17 1.4.6 The Amplifier Power Supplies 18 1.4.7 Amplifier Saturation 20 1.4.8 Symbol Convention 20 1.5 Circuit Models for Amplifiers 22 1.5.1 Voltage Amplifiers 23 1.5.2 Cascaded Amplifiers 25 1.5.3 Other Amplifier Types 27 1.5.4 Relationships between the Four Amplifier Models 27 1.5.5 Determining R. and Ro 28 1.5.6 Unilateral Models 29 1.6 Frequency Response of Amplifiers 32 1.6.1 Measuring the Amplifier Frequency Response 32 1.6.2 Amplifier Bandwidth 33 1.6.3 Evaluating the Frequency Response of Amplifiers 33 1.6.4 Single-Time-Constant Networks 34 1.6.5 Classification of Amplifiers Based on Frequency Response 40 1.7 Intrinsic Semiconductors 42 1.8 Doped Semiconductors 45 1.9 Current Flow in Semiconductors 48 1.9.1 Drift Current 48 1.9.2 Diffusion Current 51 1.9.3 Relationship between D and μ 54 1.10 The pn Junction 54 1.10.1 Physical Structure 55 1.10.2 Operation with Open-Circuit Terminals 55 1.11 The pn Junction with an Applied Voltage 62 1.11.1 Qualitative Description of Junction Operation 62 1.11.2 The Current-Voltage Relationship of the Junction 64 1.11.3 Reverse Breakdown 69 1.12 Capacitive Effects in the pn Junction 70 1.12.1 Depletion or Junction Capacitance 70
1.12.2 Diffusion Capacitance 72 Summary 73 Problems 75 2 Operational Amplifiers 90 Introduction 91 2.1 The Ideal Op Amp 91 2.1.1 The Op-Amp Terminals 91 2.1.2 Function and Characteristics of the Ideal Op Amp 92 2.1.3 Differential and Common-Mode Signals 94 2.2 The Inverting Configuration 96 2.2.1 The Closed-Loop Gain 96 2.2.2 Effect of Finite Open-Loop Gain 98 2.2.3 Input and Output Resistances 100 2.2.4 An Important Application: The Weighted Summer 103 2.3 The Noninverting Configuration 105 2.3.1 The Closed-Loop Gain 105
Contents 2.3.2 Effect of Finite Open-Loop Gain 107 2.3.3 Input and Output Resistance 107 2.3.4 The Voltage Follower 108 2.4 Difference Amplifiers 109 2.4.1 A Single-Op-Amp Difference Amplifier 110 2.4.2 A Superior Circuit: The Instrumentation Amplifier 114 2.5 Integrators and Differentiators 118 2.5.1 The Inverting Configuration with General Impedances 119 2.5.2 The Inverting Integrator 121 2.5.3 The Op-Amp Differentiator 126 2.6 DC Imperfections 128 2.6.1 Offset Voltage 128 2.6.2 Input Bias and Offset Currents 132 2.6.3 Effect of Vos and Ios on the Operation of the Inverting Integrator 135 2.7 Effect of Finite Open-Loop Gain and Bandwidth on Circuit Performance 136 2.7.1 Frequency Dependence of the Open-Loop Gain 136 2.7.2 Frequency Response of Closed-Loop Amplifiers 139 2.8 Large-Signal Operation of Op Amps 141 2.8.1 Output Voltage Saturation 142 2.8.2 Output Current Limits 142 2.8.3 Slew Rate 143 ■ Summary 147 Problems 148 3 Diodes 166 Introduction 167 3.1 The Ideal Diode 167 3.1.1 Current-Voltage Characteristic 167 3.1.2 The Rectifier 169 3.1.3 Limiting and Protection Circuits 172 3.2 Terminal Characteristics of Junction Diodes 175 3.2.1 The Forward-Bias Region 175 3.2.2 The Reverse-Bias Region 180 3.2.3 The Breakdown Region 180 3.3 Modeling the Diode 181 3.3.1 The Exponential Model 181 3.3.2 Graphical Analysis Using the Exponential Model 181 3.3.3 Iterative Analysis Using the Exponential Model 182 3.3.4 The Need for Rapid Analysis 183 3.3.5 The Constant-Voltage-Drop Model 183 3.3.6 The Ideal-Diode Model 184 3.3.7 Operation in the Reverse Breakdown Region 186 3.4 The
Small-Signal Model 187 3.5 Voltage Regulation 192 3.6 Rectifier Circuits 197 3.6.1 The Half-Wave Rectifier 198 3.6.2 The Full-Wave Rectifier 200 3.6.3 The Bridge Rectifier 201 3.6.4 The Rectifier with a Filter Capacitor—The Peak Rectifier 203 3.6.5 Precision Half-Wave Rectifier—The Superdiode 210 3.7 Other Diode Applications 211 3.7.1 The Clamped Capacitor and Bootstrapping 212 3.7.2 The Voltage Doubler 213 3.7.3 Varactors 214 3.7.4 Photodiodes 214 3.7.5 Light-Emitting Diodes (LEDs) 216 Summary 218 Problems 219 4 Bipolar Junction Transistors (BJTs) 232 Introduction 233 4.1 Device Structure and Physical Operation 233 4.1.1 Simplified Structure and Modes of Operation 233 4.1.2 Operation of the npn Transistor in the Active Mode 235 4.1.3 Structure of Actual Transistors 243 4.1.4 Operation in the Saturation Mode 243 4.1.5 The pnp Transistor 245 4.2 Current-Voltage Characteristics 247 4.2.1 Circuit Symbols and Conventions 247 4.2.2 Graphical Representation of Transistor Characteristics 252 4.2.3 Dependence of ic on the Collector Voltage—The Early Effect 253 4.2.4 An Alternative Form of the CommonEmitter Characteristics 256 4.3 BIT Circuits at DC 260 4.4 Transistor Breakdown and Temperature Effects 278 4.4.1 Transistor Breakdown 278 vii
viii Contents 4.4.2 Dependence of ß on Ic and Temperature 280 Summary 281 Problems 281 5 MOS Field-Effect Transistors (MOSFETs) 292 Introduction 293 5.1 Device Structure and Physical Operation 294 5.1.1 Device Structure 294 5.1.2 Operation with Zero Gate Voltage 296 5.1.3 Creating a Channel for Current Flow 296 5.1.4 Applying a Small vDS 298 5.1.5 Operation as vDS Is Increased 301 5.1.6 Operation for vDS vov: Channel PinchOff and Current Saturation 302 5.1.7 The p-Channel MOSFET 306 5.1.8 Complementary MOS or CMOS 308 5.2 Current-Voltage Characteristics 309 5.2.1 Circuit Symbol 309 5.2.2 The iD-vDS Characteristics 310 5.2.3 The iD-vas Characteristic 311 5.2.4 Finite Output Resistance in Saturation 315 5.2.5 Characteristics of the p-Channel MOSFET 318 5.3 MOSFET Circuits at DC 320 5.4 Technology Scaling (Moore’s Law) and Other Topics 331 5.4.1 Technology Scaling 331 5.4.2 Subthreshold Conduction and Leakage Currents 334 5.4.3 The Role of the Substrate—The Body Effect 335 5.4.4 Temperature Effects 336 5.4.5 Breakdown and Input Protection 336 5.4.6 The Depletion-Type MOSFET 337 Summary 338 Problems 339 . * 6 Transistor Amplifiers 6.1.5 The Small-Signal Voltage Gain 357 6.1.6 Determining the VTC by Graphical Analysis 363 6.1.7 Deciding on a Location for the Bias Point Q 365 6.2 Small-Signal Operation and Models 365 6.2.1 The MOSFET Case 366 6.2.2 The BJT Case 381 6.2.3 Summary Tables 401 6.3 Basic Configurations 402 6.3.1 The Three Basic Configurations 402 6.3.2 Characterizing Amplifiers 403 6.3.3 The Common-Source (CS) and Common-Emitter (CE) Amplifiers 405 6.3.4 The Common-
Source (CommonEmitter) Amplifier with a Source (Emitter) Resistance 411 6.3.5 The Common-Gate (CG) and the Common-Base (CB) Amplifiers 418 6.3.6 The Source and Emitter Followers 421 6.3.7 Summary Tables and Comparisons 431 6.3.8 When and How to Include the Output Resistance r0 431 6.4 Biasing 432 6.4.1 The MOSFET Case 433 6.4.2 The BJT Case 439 6.5 Discrete-Circuit Amplifiers 444 6.5.1 A Common-Source (CS) Amplifier 445 6.5.2 A Common-Emitter Amplifier 447 6.5.3 A Common-Emitter Amplifier with an Emitter Resistance Re 449 6.5.4 A Common-Base (CB) Amplifier 451 6.5.5 An Emitter Follower 452 6.5.6 The Amplifier Frequency Response 454 Summary 455 Problems 456 350 Introduction 351 6.1 Basic Principles 351 6.1.1 The Basis for Amplifier Operation 351 6.1.2 Obtaining a Voltage Amplifier 352 6.1.3 The Voltage-Transfer Characteristic (VTC) 354 6.1.4 Obtaining Linear Amplification by Biasing the Transistor 355 part и ANALOG INTEGRATED CIRCUITS 479 7 Building Blocks of IntegratedCircuit Amplifiers 481 Introduction 482 7.1 IC Design Philosophy 482
Contents 7.2 IC Biasing: Current Sources and Current Mirrors 484 7.2.1 The Basic MOSFET Current Source 484 7.2.2 The MOS Current Mirror 485 7.2.3 MOS Current-Steering Circuits 488 7.2.4 BJT Circuits 490 7.2.5 Small-Signal Operation of Current Mirrors 495 7.3 The Basic Gain Cell 498 7.3.1 The CS and CE Amplifiers with Current-Source Loads 498 7.3.2 The Intrinsic Gain 499 7.3.3 Effect of the Output Resistance of the Current-Source Load 502 7.3.4 Increasing the Gain of the Basic Cell 506 7.4 The Common-Gate and Common-Base Amplifiers as Current Buffers 508 7.4.1 The CG Circuit 508 7.4.2 Output Resistance of a CS Amplifier with a Source Resistance 512 7.4.3 The Body Effect in the CG Amplifier 513 7.4.4 The CB Circuit 514 7.4.5 Output Resistance of the EmitterDegenerated CE Amplifier 517 7.5 The Cascode Amplifier 518 7.5.1 The MOS Cascode Amplifier 518 7.5.2 Distribution of Voltage Gain in a Cascode Amplifier 523 7.5.3 The BJT Cascode 525 7.6 The IC Source Follower 527 7.7 Current-Mirror Circuits with Improved Performance 529 7.7.1 The Cascode MOS Mirror 530 7.7.2 The Wilson BJT Current Mirror 531 7.7.3 The Wilson MOS Mirror 534 7.7.4 The Widlar Current Source 536 Summary 538 Problems 539 8 Differential and Multistage Amplifiers 553 Introduction 554 8.1 The MOS Differential Pair 554 8.1.1 Operation with a Common-Mode Input Voltage 555 8.1.2 Operation with a Differential Input Voltage 560 8.1.3 Large-Signal Operation 561 8.1.4 Small-Signal Operation 565 8.1.5 The Differential Amplifier with Current-Source Loads 570 8.1.6 Cascode Differential Amplifier 571 8.2 The BJT Differential
Pair 573 8.2.1 Basic Operation 573 8.2.2 Input Common-Mode Range 575 8.2.3 Large-Signal Operation 576 8.2.4 Small-Signal Operation 579 8.3 Common-Mode Rejection 586 8.3.1 The MOS Case 586 8.3.2 The BJT Case 592 8.4 DC Offset 595 8.4.1 Input Offset Voltage of the MOS Differential Amplifier 595 8.4.2 Input Offset Voltage of the Bipolar Differential Amplifier 599 8.4.3 Input Bias and Offset Currents of the Bipolar Differential Amplifier 601 8.4.4 A Concluding Remark 602 8.5 The Differential Amplifier with a CurrentMirror Load 602 8.5.1 Differential-to-Single-Ended Conversion 603 8.5.2 The Current-Mirror-Loaded MOS Differential Pair 603 8.5.3 Differential Gain of the CurrentMirror-Loaded MOS Pair 606 8.5.4 The Bipolar Differential Pair with a Current-Mirror Load 610 8.5.5 Common-Mode Gain and CMRR 612 8.6 Multistage Amplifiers 615 8.6.1 A Two-Stage CMOS Op Amp 616 8.6.2 A Bipolar Op Amp 620 Summary 629 Problems 630 9 Frequency Response 649 Introduction 650 9.1 High-Frequency Transistor Models 651 9.1.1 The MOSFET 652 9.1.2 The BJT 656 9.2 High-Frequency Response of CS and CE Amplifiers 661 9.2.1 Frequency Response of the Low-Pass Single-Time-Constant Circuit 661 9.2.2 The Common-Source Amplifier 662 9.2.3 Frequency Response of the CS Amplifier When Rsig Is Low 667 ix
X Contents 9.2.4 The Common-Emitter Amplifier 671 9.2.5 Miller’s Theorem 675 9.3 The Method of Open-Circuit Time Constants 679 9.3.1 The High-Frequency Gain Function 679 9.3.2 Determining the 3-dB Frequency fH 680 9.3.3 Applying the Method of OpenCircuit Time Constants to the CS Amplifier 681 9.3.4 Application of the Method of OpenCircuit Time Constants to the CE Amplifier 685 9.4 High-Frequency Response of Common-Gate and Cascode Amplifiers 686 9.4.1 High-Frequency Response of the CG Amplifier 686 9.4.2 High-Frequency Response of the MOS Cascode Amplifier 692 9.4.3 High-Frequency Response of the Bipolar Cascode Amplifier 697 9.5 High-Frequency Response of Source and Emitter Followers 698 9.5.1 The Source-Follower Case 699 9.5.2 The Emitter-Follower Case 705 9.6 High-Frequency Response of Differential Amplifiers 706 9.6.1 Analysis of the Resistively Loaded MOS Amplifier 706 9.6.2 Frequency Response of the CurrentMirror-Loaded MOS Differential Amplifier 711 9.7 Other Wideband Amplifier Configurations 716 9.7.1 Obtaining Wideband Amplification by Source or Emitter Degeneration 716 9.7.2 Increasing fH by Buffering the Input Signal Source 719 9.7.3 Increasing fa by Eliminating the Miller Effect Using a CG or a CB Configuration with an Input Buffer 723 9.8 Low-Frequency Response of DiscreteCircuit CS and CE Amplifiers 726 9.8.1 Frequency Response of the High-Pass Single-Time-Constant Circuit 726 9.8.2 The CS Amplifier 727 9.8.3 The Method of Short-Circuit Time Constants 734 9.8.4 The CE Amplifier 735 Summary 739 Problems 740 10 Feedback 755 Introduction 756 10.1 The General
Feedback Structure 757 10.1.1 Signal-Flow Diagram 757 10.1.2 The Closed-Loop Gain 758 10.1.3 The Loop Gain 759 10.1.4 The Ideal Case of Infinite OpenLoop Gain A 760 10.1.5 Summary 764 10.2 Some Properties of Negative Feedback 764 10.2.1 Gain Desensitivity 764 10.2.2 Bandwidth Extension 765 10.2.3 Reduction in Nonlinear Distortion 766 10.3 The Feedback Voltage Amplifier 768 10.3.1 The Series-Shunt Feedback Topology 768 10.3.2 Examples of Series-Shunt Feedback Amplifiers 769 10.3.3 Analysis of the Feedback Voltage Amplifier 771 10.3.4 A Final Remark 777 10.4 Systematic Analysis of Feedback Voltage Amplifiers 778 10.4.1 The Ideal Case 778 10.4.2 The Practical Case 780 10.5 Other Feedback-Amplifier Types 789 10.5.1 Basic Principles 789 10.5.2 The Feedback Transconductance Amplifier (Series-Series) 792 10.5.3 The Feedback Transresistance Amplifier (Shunt-Shunt) 802 10.5.4 The Feedback Current Amplifier (Shunt-Series) 809 10.6 Summary of the Feedback-Analysis Method 814 10.7 The Stability Problem 814 10.8 Effect of Feedback on the Amplifier Poles 817 10.8.1 Stability and Pole Location 817 10.8.2 Poles of the Feedback Amplifier 817 10.8.3 Amplifiers with a Single-Pole Response 818 10.8.4 Amplifiers with a Two-Pole Response 820 10.8.5 Amplifiers with Three or More Poles 822 10.9 Stability Study Using Bode Plots 824 10.9.1 Gain and Phase Margins 824 10.9.2 Effect of Phase Margin on ClosedLoop Response 825 10.9.3 An Alternative Approach for Investigating Stability 826
Contents 10.10 Frequency Compensation 829 10.10.1 Theory 829 10.10.2 Implementation 830 10.10.3 Miller Compensation and Pole Splitting 831 Summary 835 Problems 836 11 Output Stages and Power Amplifiers 857 Introduction 858 11.1 Classification of Output Stages 858 11.2 Class A Output Stage 860 11.2.1 Transfer Characteristic 860 11.2.2 Signal Waveforms 863 11.2.3 Power Dissipation 864 11.2.4 Power-Conversion Efficiency 866 11.3 Class В Output Stage 867 11.3.1 Circuit Operation 867 11.3.2 Transfer Characteristic 867 11.3.3 Power-Conversion Efficiency 868 11.3.4 Power Dissipation 869 11.4 Class AB Output Stage 872 11.4.1 Circuit Operation 872 11.4.2 Output Resistance 874 11.5 Biasing the Class AB Circuit 877 11.5.1 Biasing Using Diodes 877 11.5.2 Biasing Using the VBE Multiplier 879 11.5.3 Use of Input Emitter Followers 882 11.5.4 Use of Compound Devices 883 11.6 CMOS Output Stages 885 11.6.1 The Source Follower 886 11.6.2 An Alternative Using a CommonSource Transistor 887 11.6.3 Class D Power Amplifiers 891 11.7 Power Transistors 894 11.7.1 Packages and Heat Sinks 894 11.7.2 Power BJTs 894 11.7.3 Power MOSFETs 895 Summary 897 Problems 898 12 Operational-Amplifier Circuits 906 Introduction 907 12.1 The Two-Stage CMOS Op Amp 908 12.1.1 The Circuit 908 12.1.2 Input Common-Mode Range and Output Swing 909 12.1.3 DC Voltage Gain 910 12.1.4 Common-Mode Rejection Ratio (CMRR) 912 12.1.5 Frequency Response 913 12.1.6 Slew Rate 918 12.1.7 Power-Supply Rejection Ratio (PSRR) 919 12.1.8 Design Trade-Offs 920 12.2 The Folded-Cascode CMOS OpAmp 925 12.2.1 The Circuit 926 12.2.2 Input
Common-Mode Range and Output Swing 927 12.2.3 Voltage Gain 929 12.2.4 Frequency Response 931 12.2.5 Slew Rate 932 12.2.6 Increasing the Input CommonMode Range: Rail-to-Rail Input Operation 934 12.2.7 Increasing the Output Voltage Range: The Wide-Swing Current Mirror 935 12.3 BJT Op-Amp Techniques 937 12.3.1 Bias Design 938 12.3.2 Design of the Input Stage 939 12.3.3 Common-Mode Feedback to Control the DC Voltage at the Output of the Input Stage 946 12.3.4 The 741 Op Amp Input Stage 950 12.3.5 Output-Stage Design for Near Railto-Rail Output Swing 959 Summary 964 Problems 964 13 Filters and Oscillators 974 Introduction 975 13.1 Basic Filter Concepts 976 13.1.1 Filter Transmission 976 13.1.2 Filter Types 976 13.1.3 Filter Specification 977 13.1.4 Obtaining the Filter Transfer Function: Filter Approximation 979 13.1.5 Obtaining the Filter Circuit: Filter Realization 980 13.2 The Filter Transfer Function 981 13.2.1 The Filter Order 981 13.2.2 The Filter Poles 981 13.2.3 The Filter Transmission Zeros 982 13.2.4 All-Pole Filters 984 13.2.5 Factoring T(s) into the Product of First-Order and Second-Order Functions 985 13.2.6 First-Order Filters 986 13.2.7 Second-Order Filter Functions 988 xi
xii ^ ·· Contents 13.3 Butterworth and Chebyshev Filters 991 13.3.1 The Butterworth Filter 991 13.3.2 The Chebyshev Filter 997 13.4 Second-Order Passive Filters Based on the LCR Resonator 1000 13.4.1 The Resonator Poles 1000 13.4.2 Realization of Transmission Zeros 1001 13.4.3 Realization of the Low-Pass Function 1002 13.4.4 Realization of the Bandpass Function 1002 13.4.5 Realization of the Notch Functions 1002 13.5 Second-Order Active Filters Based on Inductance Simulation 1004 13.5.1 The Antoniou InductanceSimulation Circuit 1005 13.5.2 The Op Amp-RC Resonator 1005 13.5.3 Realization of the Various Filter Types 1007 13.6 Second-Order Active Filters Based on the Two-Integrator Loop 1011 13.6.1 Derivation of the Two-IntegratorLoop Biquad 1011 13.6.2 Circuit Implementation 1013 13.6.3 An Alternative Two-Integrator-Loop Biquad Circuit 1014 13.6.4 Final Remarks 1016 13.7 Second Order Active Filters Using a Single Op Amp 1018 13.7.1 Bandpass Circuit 1018 13.7.2 High-Pass Circuit 1020 13.7.3 Low-Pass Circuit 1021 13.8 Switched-Capacitor Filters 1023 13.8.1 The Basic Principle 1023 13.8.2 Switched-Capacitor Integrator 1024 13.8.3 Switched-Capacitor Biquad Filter 1025 13.8.4 Final Remarks 1028 13.9 Basic Principles of Sinusoidal Oscillators 1028 13.9.1 The Oscillator Feedback Loop 1028 13.9.2 The Oscillation Criterion 1029 13.9.3 Analysis of Oscillator Circuits 1030 13.9.4 Nonlinear Amplitude Control 1034 13.10 Op Amp-RC Oscillator Circuits 1036 13.10.1 The Wien-Bridge Oscillator 1036 13.10.2 The Phase-Shift Oscillator 1039 13.10.3 The Quadrature Oscillator 1041 13.10.4 The
Active-Filter-Tuned Oscillator 1042 13.10.5 A Final Remark 1044 13.11 LC and Crystal Oscillators 1044 13.11.1 The Colpitts and Hartely Oscillators 1044 13.11.2 The Cross-Coupled LC Oscillator 1048 13.11.3 Crystal Oscillators 1050 13.12 Nonlinear Oscillators or Function Generators 1052 13.12.1 The Bistable Feedback Loop 1052 13.12.2 Transfer Characteristic of the Bistable Circuit 1054 13.12.3 Triggering the Bistable Circuit 1055 13.12.4 The Bistable Circuit as a Memory Element 1055 13.12.5 A Bistable Circuit with Noninverting Transfer Characteristic 1056 13.12.6 Generating Square Waveforms Using a Bistable Circuit 1057 13.12.7 Generating Triangular Waveforms 1060 13.12.8 Generation of Sine Waves 1062 Summary 1062 Problems 1063 part ill DIGITAL INTEGRATED CIRCUITS 1076 14 CMOS Digital Logic Circuits 1078 Introduction 1079 14.1 CMOS Logic-Gate Circuits 1079 14.1.1 Switch-Level Transistor Model 1079 14.1.2 The CMOS Inverter 1079 14.1.3 General Structure of CMOS Logic 1080 14.1.4 The Two-Input NOR Gate 1084 14.1.5 The Two-Input NAND Gate 1084 14.1.6 A Complex Gate 1085 14.1.7 Obtaining the PUN from the PDN and Vice Versa 1085 14.1.8 The Exclusive-OR Function 1086 14.1.9 Summary of the Synthesis Method 1087 14.2 Digital Logic Inverters 1089 14.2.1 The Voltage-Transfer Characteristic (VTC) 1089 14.2.2 Noise Margins 1090 14.2.3 The Ideal VTC 1092
Contents 14.2.4 Inverter Implementation 1093 14.3 The CMOS Inverter 1101 14.3.1 Circuit Operation 1102 14.3.2 The Voltage-Transfer Characteristic (VTC) 1104 14.3.3 The Situation When QN and QP Are Not Matched 1107 Summary 1112 Problems 1113 15 Digital Design: Power, Speed, and Area 1117 Introduction 1118 15.1 Dynamic Operation of the CMOS Inverter 1118 15.1.1 Propagation Delay 1118 15.1.2 Determining the Propagation Delay of the CMOS Inverter 1122 15.1.3 Determining the Equivalent Load Capacitance C 1129 15.2 Transistor Sizing 1132 15.2.1 Inverter Sizing 1133 15.2.2 Transistor Sizing in CMOS Logic Gates 1135 15.2.3 Effects of Fan-In and Fan-Out on Propagation Delay 1138 15.2.4 Driving a Large Capacitance 1139 15.3 Power Dissipation 1142 15.3.1 Sources of Power Dissipation 1142 15.3.2 Power-Delay and Energy-Delay Products 1146 15.4 Implications of Technology Scaling: Issues in Deep-Submicron Design 1147 15.4.1 Silicon Area 1147 15.4.2 Scaling Implications 1147 15.4.3 Temperature, Voltage, and Process Variations 1149 15.4.4 Wiring: The Interconnect 1149 15.4.5 Digital Design in Modern Technologies 1150 Summary 1151 Problems 1153 16 Memory and Clocking Circuits 1159 Introduction 1160 16.1 The Transmission Gate 16.1.1 Operation with NMOS Transistors as Switches 1161 16.1.2 Restoring the Value of V0H to VDD 1165 16.1.3 The Use of CMOS Transmission Gates as Switches 1166 16.2 Latches and Flip-Flops 1172 16.2.1 The Latch 1172 16.2.2 The SR Flip-Flop 1174 16.2.3 CMOS Implementation of SR FlipFlops 1175 16.2.4 A Simpler CMOS Implementation of the Clocked SR Flip-Flop 1180 16.2.5 D
Flip-Flop Circuits 1180 16.3 Random-Access Memory (RAM) Cells 1183 16.3.1 Static Memory (SRAM) Cell 1185 16.3.2 Dynamic Memory (DRAM) Cell 1192 16.3.3 Flash Memory 1194 16.4 Ring Oscillators and Special-Purpose Circuits 1196 16.4.1 Ring Oscillators and Other PulseGeneration Circuits 1196 16.4.2 The Sense Amplifier 1198 16.4.3 The Row-Address Decoder 1203 16.4.4 The Column-Address Decoder 1205 Summary 1206 Problems 1207 Appendices A. VLSI Fabrication Technology* A-1 B. SPICE Device Models and Design with Simulation Examples* B-1 C. Two-Port Network Parameters* C-1 D. Some Useful Network Theorems* D-1 E. Single-Time-Constant Circuits* E-1 F. s-Domain Analysis: Poles, Zeros, and Bode Plots* F-1 G. Comparison of the MOSFET and the BJT* G-1 H. Filter Design Material* H-1 I. Bibliography* 1-1 J. Standard Resistance Values and Unit Prefixes J-1 K. Typical Parameter Values for IC Devices Fabricated in CMOS and Bipolar Processes K-1 L. Answers to Selected Problems* L-1 Summary Tables* ST 1160 Index IN-1 Available online at www.oup.com/he/sedra-smith8xe. xiii |
| any_adam_object | 1 |
| any_adam_object_boolean | 1 |
| author | Sedra, Adel S. 1943- Smith, Kenneth C. 1932- Carusone, Tony Chan Gaudet, Vincent ca. 20./21. Jh |
| author_GND | (DE-588)1067465537 (DE-588)105069581X (DE-588)1022635042 (DE-588)1326252968 |
| author_facet | Sedra, Adel S. 1943- Smith, Kenneth C. 1932- Carusone, Tony Chan Gaudet, Vincent ca. 20./21. Jh |
| author_role | aut aut aut aut |
| author_sort | Sedra, Adel S. 1943- |
| author_variant | a s s as ass k c s kc kcs t c c tc tcc v g vg |
| building | Verbundindex |
| bvnumber | BV047499621 |
| callnumber-first | T - Technology |
| callnumber-label | TK7867 |
| callnumber-raw | TK7867 |
| callnumber-search | TK7867 |
| callnumber-sort | TK 47867 |
| callnumber-subject | TK - Electrical and Nuclear Engineering |
| classification_rvk | ZN 4900 |
| ctrlnum | (OCoLC)1259327915 (DE-599)KXP176230418X |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | International eighth edition |
| format | Book |
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| id | DE-604.BV047499621 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T18:18:25Z |
| indexdate | 2024-08-01T16:14:55Z |
| institution | BVB |
| isbn | 9780190853501 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032900700 |
| oclc_num | 1259327915 |
| open_access_boolean | |
| owner | DE-862 DE-BY-FWS DE-83 DE-706 DE-739 |
| owner_facet | DE-862 DE-BY-FWS DE-83 DE-706 DE-739 |
| physical | xxviii, 1212 Seiten, 24 verschieden gezählte Seiten Diagramme |
| publishDate | 2021 |
| publishDateSearch | 2021 |
| publishDateSort | 2021 |
| publisher | Oxford University Press |
| record_format | marc |
| series2 | The Oxford series in electrical and computer engineering |
| spellingShingle | Sedra, Adel S. 1943- Smith, Kenneth C. 1932- Carusone, Tony Chan Gaudet, Vincent ca. 20./21. Jh Microelectronic circuits Schaltungsentwurf (DE-588)4179389-4 gnd Mikroelektronik (DE-588)4039207-7 gnd |
| subject_GND | (DE-588)4179389-4 (DE-588)4039207-7 |
| title | Microelectronic circuits |
| title_auth | Microelectronic circuits |
| title_exact_search | Microelectronic circuits |
| title_exact_search_txtP | Microelectronic circuits |
| title_full | Microelectronic circuits Adel S. Sedra (University of Waterloo), Kenneth C. Smith (University of Toronto), Tony Chan Carusone (University of Toronto), Vincent Gaudet (University of Waterloo) |
| title_fullStr | Microelectronic circuits Adel S. Sedra (University of Waterloo), Kenneth C. Smith (University of Toronto), Tony Chan Carusone (University of Toronto), Vincent Gaudet (University of Waterloo) |
| title_full_unstemmed | Microelectronic circuits Adel S. Sedra (University of Waterloo), Kenneth C. Smith (University of Toronto), Tony Chan Carusone (University of Toronto), Vincent Gaudet (University of Waterloo) |
| title_short | Microelectronic circuits |
| title_sort | microelectronic circuits |
| topic | Schaltungsentwurf (DE-588)4179389-4 gnd Mikroelektronik (DE-588)4039207-7 gnd |
| topic_facet | Schaltungsentwurf Mikroelektronik |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=032900700&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
| work_keys_str_mv | AT sedraadels microelectroniccircuits AT smithkennethc microelectroniccircuits AT carusonetonychan microelectroniccircuits AT gaudetvincent microelectroniccircuits |