Dual port SRAM - overview:
Course content reaffirmed: 06/2015--This is the first in a series of tutorials on the design of a dual port SRAM. In this first tutorial an overview of the dual port SRAM is presented and compared to the single port SRAM. The benefits of a dual port at the system level are discussed followed by more...
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| Main Author: | |
|---|---|
| Format: | Electronic Video |
| Language: | English |
| Published: |
United States
IEEE
2010
|
| Subjects: | |
| Online Access: | FHN01 TUM01 |
| Summary: | Course content reaffirmed: 06/2015--This is the first in a series of tutorials on the design of a dual port SRAM. In this first tutorial an overview of the dual port SRAM is presented and compared to the single port SRAM. The benefits of a dual port at the system level are discussed followed by more details at the chip level which includes block diagrams and chip plans. The special requirements for the two independent ports accessing the shared memory array are reviewed in detail along with the operation of the dual port memory cell |
| Item Description: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) |
| Physical Description: | 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations |
| ISBN: | 9781424462131 |
Staff View
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| spelling | Sheppard, Doug Verfasser aut Dual port SRAM - overview Doug Sheppard Dual port static random-access memory - overview United States IEEE 2010 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 13, 2020) Course content reaffirmed: 06/2015--This is the first in a series of tutorials on the design of a dual port SRAM. In this first tutorial an overview of the dual port SRAM is presented and compared to the single port SRAM. The benefits of a dual port at the system level are discussed followed by more details at the chip level which includes block diagrams and chip plans. The special requirements for the two independent ports accessing the shared memory array are reviewed in detail along with the operation of the dual port memory cell Random access memory Integrated circuits (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug Dual port SRAM - overview Random access memory Integrated circuits |
| subject_GND | (DE-588)4017102-4 |
| title | Dual port SRAM - overview |
| title_alt | Dual port static random-access memory - overview |
| title_auth | Dual port SRAM - overview |
| title_exact_search | Dual port SRAM - overview |
| title_exact_search_txtP | Dual port SRAM - overview |
| title_full | Dual port SRAM - overview Doug Sheppard |
| title_fullStr | Dual port SRAM - overview Doug Sheppard |
| title_full_unstemmed | Dual port SRAM - overview Doug Sheppard |
| title_short | Dual port SRAM - overview |
| title_sort | dual port sram overview |
| topic | Random access memory Integrated circuits |
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