SRAM design - clock buffer:

Course content reaffirmed: 06/2015--The design is now entering into the timing relationships between the various circuits in the RAM and how they interact with each other. The Clock Buffer is where it all starts and, as such, is critical in designing the timing throughout the RAM. A very special fun...

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Bibliographic Details
Main Author: Sheppard, Doug (Author)
Format: Electronic Video
Language:English
Published: United States IEEE 2010
Subjects:
Online Access:FHN01
TUM01
Summary:Course content reaffirmed: 06/2015--The design is now entering into the timing relationships between the various circuits in the RAM and how they interact with each other. The Clock Buffer is where it all starts and, as such, is critical in designing the timing throughout the RAM. A very special function of the Clock Buffer is to capture the rising edge of Clock and then create the key internal clock that will be self-timed and not dependant on the falling edge of Clock. This is the first step in designing the control circuitry that creates the various signals that control all aspects of the RAM.
Item Description:Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020)
Physical Description:1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations
ISBN:9781424461745

There is no print copy available.

Interlibrary loan Place Request Caution: Not in THWS collection!