SRAM design - clock buffer:
Course content reaffirmed: 06/2015--The design is now entering into the timing relationships between the various circuits in the RAM and how they interact with each other. The Clock Buffer is where it all starts and, as such, is critical in designing the timing throughout the RAM. A very special fun...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch Video |
| Sprache: | English |
| Veröffentlicht: |
United States
IEEE
2010
|
| Schlagworte: | |
| Online-Zugang: | FHN01 TUM01 |
| Zusammenfassung: | Course content reaffirmed: 06/2015--The design is now entering into the timing relationships between the various circuits in the RAM and how they interact with each other. The Clock Buffer is where it all starts and, as such, is critical in designing the timing throughout the RAM. A very special function of the Clock Buffer is to capture the rising edge of Clock and then create the key internal clock that will be self-timed and not dependant on the falling edge of Clock. This is the first step in designing the control circuitry that creates the various signals that control all aspects of the RAM. |
| Beschreibung: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) |
| Beschreibung: | 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations |
| ISBN: | 9781424461745 |
Internformat
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Datensatz im Suchindex
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| dewey-raw | 621.38173 |
| dewey-search | 621.38173 |
| dewey-sort | 3621.38173 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| discipline_str_mv | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic Video |
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| indexdate | 2024-07-10T09:13:11Z |
| institution | BVB |
| isbn | 9781424461745 |
| language | English |
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| spelling | Sheppard, Doug Verfasser aut SRAM design - clock buffer Doug Sheppard Static random-access memory design - clock buffer United States IEEE 2010 1 Online-Resource (1 Videodatei, 60 Minuten) color illustrations tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) Course content reaffirmed: 06/2015--The design is now entering into the timing relationships between the various circuits in the RAM and how they interact with each other. The Clock Buffer is where it all starts and, as such, is critical in designing the timing throughout the RAM. A very special function of the Clock Buffer is to capture the rising edge of Clock and then create the key internal clock that will be self-timed and not dependant on the falling edge of Clock. This is the first step in designing the control circuitry that creates the various signals that control all aspects of the RAM. Integrated circuits Data processing Signal processing Random access memory (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug SRAM design - clock buffer Integrated circuits Data processing Signal processing Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | SRAM design - clock buffer |
| title_alt | Static random-access memory design - clock buffer |
| title_auth | SRAM design - clock buffer |
| title_exact_search | SRAM design - clock buffer |
| title_exact_search_txtP | SRAM design - clock buffer |
| title_full | SRAM design - clock buffer Doug Sheppard |
| title_fullStr | SRAM design - clock buffer Doug Sheppard |
| title_full_unstemmed | SRAM design - clock buffer Doug Sheppard |
| title_short | SRAM design - clock buffer |
| title_sort | sram design clock buffer |
| topic | Integrated circuits Data processing Signal processing Random access memory |
| topic_facet | Integrated circuits Data processing Signal processing Random access memory Film |
| work_keys_str_mv | AT shepparddoug sramdesignclockbuffer AT shepparddoug staticrandomaccessmemorydesignclockbuffer |