SRAM design - mux factor and data buffer:
Course content reaffirmed: 06/2015--This tutorial continues the design of the read path from the output of the sense amp through the Data Out Buffer into the data out driver and eventually to the pad that the customer connects to. The dual use of the sense amp clock signal is discussed whereby it cr...
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| Main Author: | |
|---|---|
| Format: | Electronic Video |
| Language: | English |
| Published: |
United States
IEEE
2009
|
| Subjects: | |
| Online Access: | FHN01 TUM01 |
| Summary: | Course content reaffirmed: 06/2015--This tutorial continues the design of the read path from the output of the sense amp through the Data Out Buffer into the data out driver and eventually to the pad that the customer connects to. The dual use of the sense amp clock signal is discussed whereby it creates an additional 1 of 2 decode that results in a mux factor of four. Other mux factors will be designed to allow for a reconfigurable memory. A new control signal called Output Enable will be discussed and will be designed into the Data Out Buffer for controlling how the SRAM drives the data out pad. As always, plots of the layout and an extracted SPICE netlist from layout will be included |
| Item Description: | Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) |
| Physical Description: | 1 Online-Resource (1 Videodatei, 60 Minuten) |
| ISBN: | 9781424461332 |
Staff View
MARC
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| isbn | 9781424461332 |
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| spelling | Sheppard, Doug Verfasser aut SRAM design - mux factor and data buffer Doug Sheppard Static random-access memory design - mux factor and data buffer United States IEEE 2009 1 Online-Resource (1 Videodatei, 60 Minuten) tdi rdacontent c rdamedia cr rdacarrier Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 12, 2020) Course content reaffirmed: 06/2015--This tutorial continues the design of the read path from the output of the sense amp through the Data Out Buffer into the data out driver and eventually to the pad that the customer connects to. The dual use of the sense amp clock signal is discussed whereby it creates an additional 1 of 2 decode that results in a mux factor of four. Other mux factors will be designed to allow for a reconfigurable memory. A new control signal called Output Enable will be discussed and will be designed into the Data Out Buffer for controlling how the SRAM drives the data out pad. As always, plots of the layout and an extracted SPICE netlist from layout will be included Integrated circuits Random access memory (DE-588)4017102-4 Film gnd-content |
| spellingShingle | Sheppard, Doug SRAM design - mux factor and data buffer Integrated circuits Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | SRAM design - mux factor and data buffer |
| title_alt | Static random-access memory design - mux factor and data buffer |
| title_auth | SRAM design - mux factor and data buffer |
| title_exact_search | SRAM design - mux factor and data buffer |
| title_exact_search_txtP | SRAM design - mux factor and data buffer |
| title_full | SRAM design - mux factor and data buffer Doug Sheppard |
| title_fullStr | SRAM design - mux factor and data buffer Doug Sheppard |
| title_full_unstemmed | SRAM design - mux factor and data buffer Doug Sheppard |
| title_short | SRAM design - mux factor and data buffer |
| title_sort | sram design mux factor and data buffer |
| topic | Integrated circuits Random access memory |
| topic_facet | Integrated circuits Random access memory Film |
| work_keys_str_mv | AT shepparddoug sramdesignmuxfactoranddatabuffer AT shepparddoug staticrandomaccessmemorydesignmuxfactoranddatabuffer |