Frontiers in Hardware Security and Trust: Theory, Design and Practice
This book provides a comprehensive review of emerging security threats and privacy protection issues, and the versatile state-of-the-art hardware-based security countermeasures proposed by the hardware security community. It serves as an advanced reference for researchers on current hardware securit...
Saved in:
| Main Author: | |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Stevenage
The Institution of Engineering & Technology, IET
2020
|
| Series: | IET Materials, Circuits and Devices Series
66 |
| Online Access: | UBY01 UER01 |
| Summary: | This book provides a comprehensive review of emerging security threats and privacy protection issues, and the versatile state-of-the-art hardware-based security countermeasures proposed by the hardware security community. It serves as an advanced reference for researchers on current hardware security problems, challenges and solutions |
| Physical Description: | 1 Online-Ressource (445 Seiten) |
| ISBN: | 9781785619281 |
Staff View
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| 490 | 1 | |a IET Materials, Circuits and Devices Series |v 66 | |
| 505 | 8 | |a Intro -- Contents -- About the editors -- Preface -- Part I. Hardware security threats -- 1. IP/IC piracy threats of reversible circuits | Samah Mohamed Saeed -- 1.1 Introduction -- 1.2 Reversible logic -- 1.3 Motivation and threat model -- 1.4 IP/IC piracy attacks -- 1.5 Countermeasures -- 1.6 Summary -- References -- 2. Improvements and recent updates of persistent fault analysis on block ciphers | Fan Zhang, Bolin Yang, Guorui Xu, Xiaoxuan Lou, Shivam Bhasin, Xinjie Zhao, Shize Guo, and Kui Ren -- 2.1 Introduction -- 2.2 Related works -- 2.3 Persistent fault attack -- 2.4 PFA with multiple faults -- 2.5 Validation of PFA on AES-128 -- 2.6 Defeating fault attack countermeasures with PFA -- 2.7 Case studies: breaking public implementation of masking schemes with single fault -- 2.8 Conclusion -- References -- 3. Deployment of EMC techniques in design of IC chips for hardware security | Makoto Nagata -- 3.1 Overview -- 3.2 EMC simulation technique -- 3.3 SC leakage analysis -- 3.4 Conclusion -- Acknowledgments -- References -- Part II. Design for security -- 4. Hardware obfuscation for IP protection | Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, and Swarup Bhunia -- 4.1 Introduction -- 4.2 Threat models -- 4.3 Hardware obfuscation techniques -- 4.4 Attacks on hardware obfuscation -- 4.5 The trends of hardware obfuscation -- 4.6 Future direction -- 4.7 Summary -- References -- 5. Formal verification for SoC security | Jiaji He, Xialong Guo, Yiqiang Zhao and Yier Jin -- 5.1 Introduction -- 5.2 Related work -- 5.3 Background and preliminary -- 5.4 Methodology -- 5.5 Implementations -- 5.6 Experimental results -- 5.7 Information-flow tracking-based detection -- 5.8 Conclusions -- 5.9 Discussions and future research directions -- References | |
| 505 | 8 | |a 6. Silicon-based true random number generators | Yuan Cao, Egbochukwu Chukwuemeka Chidiebere, Chenkai Fang, Mingrui Zhou,Wanyi Liu, Xiaojin Zhao, and Chip-Hong Chang -- 6.1 Introduction -- 6.2 Pseudo random number generators -- 6.3 True random number generators -- 6.4 Post-processing -- 6.5 TRNG randomness tests -- 6.6 Conclusion -- Acknowledgments -- References -- 7. Micro-architectural attacks and countermeasures on public-key implementations | Sarani Bhattacharya and Debdeep Mukhopadhyay -- 7.1 Introduction -- 7.2 Related works -- 7.3 Branch-predictor security -- 7.4 Branch misprediction attack -- 7.5 Inserting real-time faults in public-key secret using rowhammer -- 7.6 Fault attack revealing secret keys of exponentiation algorithms from branch prediction misses -- 7.7 Deduce and remove attack on blinded scalar multiplication with asynchronous perf ioctl calls -- 7.8 Extending deduce and remove to a publicly available cryptographic implementation -- 7.9 Online detection and reactive countermeasure for leakage from BPU using TVLA -- 7.10 General mitigation against branch prediction attacks -- 7.11 Existing countermeasures -- 7.12 Conclusion -- Appendix A: Perf handler Code -- Appendix B: RELIC codes -- References -- 8. Mitigating the CACHEKIT attack | Mauricio Gutierrez, Ziming Zhao, Adam Doupé, Yan Shoshitaishvili, and Gail-Joon Ahn -- 8.1 Introduction -- 8.2 Background: ARM, cache, and TrustZone -- 8.3 The Genode operating system framework -- 8.4 Background: CacheKit attack -- 8.5 Defeating CacheKit attacks: naïve approaches -- 8.6 Defeating CacheKit attacks: CacheLight -- 8.7 CacheLight implementation -- 8.8 Evaluation -- 8.9 Related work -- 8.10 Future work -- 8.11 Conclusion -- References -- 9. Deep learning network security | Si Wang and Chip-Hong Chang -- 9.1 Introduction -- 9.2 Preliminaries -- 9.3 Misprediction attacks | |
| 505 | 8 | |a 9.4 Confidentiality attacks -- 9.5 Explainability -- 9.6 Conclusion -- Acknowledgment -- References -- 10. Security implications of non-digital components | Xiaoxi Ren, Zhe Zhou, Di Tang, and Kehuan Zhang -- 10.1 Introduction -- 10.2 Case study 1: Face Flashing-using light reflections to secure liveness detections -- 10.3 Case study 2: Secure mobile payment via imperfection of LCD screens -- 10.4 Conclusion -- References -- 11. Accelerating homomorphic encryption in hardware: a review | Truong Phu Truan Ho and Chip-Hong Chang -- 11.1 Introduction -- 11.2 Fan-Vercauteren (FV) homomorphic encryption scheme -- 11.3 Polynomial multiplication -- 11.4 Residue number system -- 11.5 Hardware accelerators -- 11.6 Conclusion -- References -- 12. Information leakage from robust codes protecting cryptographic primitives | Osnat Keren and Ilia Polian -- 12.1 Introduction -- 12.2 Fault injection attacks -- 12.3 Robust code-based architectures -- 12.4 Security-oriented codes -- 12.5 Information leakage from robust code-based checkers -- Acknowledgment -- References -- Part III. Physical-layer security -- 13. Confidential and energy-efficient cognitive communications by physical-layer security | Pin-Hsun Lin and Eduard A. Jorswieck -- 13.1 Introduction -- 13.2 Preliminaries -- 13.3 Radio resource allocation for EE maximization -- 13.4 Numerical experiments and assessments -- 13.5 Conclusions -- Appendix I: Proof of Proposition 13.5 -- References -- 14. Physical-layer security for mmWave massive MIMO communications in 5G networks | NingWang, Long Jiao, Jie Tang, and Kai Zeng -- 14.1 Physical-layer threats in mmWave massive MIMO -- 14.2 Physical-layer security in mmWave -- 14.3 Physical-layer security in massive MIMO -- 14.4 PLS schemes integratingmmWave massive MIMO with other 5G scenarios and techniques -- Acknowledgment -- References | |
| 505 | 8 | |a 15. Security of in-vehicle controller area network: a review and future directions | Zhaojun Lu, QianWang, Gang Qu, and Zhenglin Liu -- 15.1 Introduction -- 15.2 Overview of CAN protocol -- 15.3 Vulnerabilities and attack interfaces -- 15.4 Attack models -- 15.5 Countermeasures -- 15.6 Future directions -- 15.7 Conclusions -- References -- Index | |
| 520 | |a This book provides a comprehensive review of emerging security threats and privacy protection issues, and the versatile state-of-the-art hardware-based security countermeasures proposed by the hardware security community. It serves as an advanced reference for researchers on current hardware security problems, challenges and solutions | ||
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Record in the Search Index
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| author | Chang, Chip Hong |
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| author_facet | Chang, Chip Hong |
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| author_sort | Chang, Chip Hong |
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| bvnumber | BV047442481 |
| collection | ZDB-30-PQE ZDB-100-IET |
| contents | Intro -- Contents -- About the editors -- Preface -- Part I. Hardware security threats -- 1. IP/IC piracy threats of reversible circuits | Samah Mohamed Saeed -- 1.1 Introduction -- 1.2 Reversible logic -- 1.3 Motivation and threat model -- 1.4 IP/IC piracy attacks -- 1.5 Countermeasures -- 1.6 Summary -- References -- 2. Improvements and recent updates of persistent fault analysis on block ciphers | Fan Zhang, Bolin Yang, Guorui Xu, Xiaoxuan Lou, Shivam Bhasin, Xinjie Zhao, Shize Guo, and Kui Ren -- 2.1 Introduction -- 2.2 Related works -- 2.3 Persistent fault attack -- 2.4 PFA with multiple faults -- 2.5 Validation of PFA on AES-128 -- 2.6 Defeating fault attack countermeasures with PFA -- 2.7 Case studies: breaking public implementation of masking schemes with single fault -- 2.8 Conclusion -- References -- 3. Deployment of EMC techniques in design of IC chips for hardware security | Makoto Nagata -- 3.1 Overview -- 3.2 EMC simulation technique -- 3.3 SC leakage analysis -- 3.4 Conclusion -- Acknowledgments -- References -- Part II. Design for security -- 4. Hardware obfuscation for IP protection | Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, and Swarup Bhunia -- 4.1 Introduction -- 4.2 Threat models -- 4.3 Hardware obfuscation techniques -- 4.4 Attacks on hardware obfuscation -- 4.5 The trends of hardware obfuscation -- 4.6 Future direction -- 4.7 Summary -- References -- 5. Formal verification for SoC security | Jiaji He, Xialong Guo, Yiqiang Zhao and Yier Jin -- 5.1 Introduction -- 5.2 Related work -- 5.3 Background and preliminary -- 5.4 Methodology -- 5.5 Implementations -- 5.6 Experimental results -- 5.7 Information-flow tracking-based detection -- 5.8 Conclusions -- 5.9 Discussions and future research directions -- References 6. Silicon-based true random number generators | Yuan Cao, Egbochukwu Chukwuemeka Chidiebere, Chenkai Fang, Mingrui Zhou,Wanyi Liu, Xiaojin Zhao, and Chip-Hong Chang -- 6.1 Introduction -- 6.2 Pseudo random number generators -- 6.3 True random number generators -- 6.4 Post-processing -- 6.5 TRNG randomness tests -- 6.6 Conclusion -- Acknowledgments -- References -- 7. Micro-architectural attacks and countermeasures on public-key implementations | Sarani Bhattacharya and Debdeep Mukhopadhyay -- 7.1 Introduction -- 7.2 Related works -- 7.3 Branch-predictor security -- 7.4 Branch misprediction attack -- 7.5 Inserting real-time faults in public-key secret using rowhammer -- 7.6 Fault attack revealing secret keys of exponentiation algorithms from branch prediction misses -- 7.7 Deduce and remove attack on blinded scalar multiplication with asynchronous perf ioctl calls -- 7.8 Extending deduce and remove to a publicly available cryptographic implementation -- 7.9 Online detection and reactive countermeasure for leakage from BPU using TVLA -- 7.10 General mitigation against branch prediction attacks -- 7.11 Existing countermeasures -- 7.12 Conclusion -- Appendix A: Perf handler Code -- Appendix B: RELIC codes -- References -- 8. Mitigating the CACHEKIT attack | Mauricio Gutierrez, Ziming Zhao, Adam Doupé, Yan Shoshitaishvili, and Gail-Joon Ahn -- 8.1 Introduction -- 8.2 Background: ARM, cache, and TrustZone -- 8.3 The Genode operating system framework -- 8.4 Background: CacheKit attack -- 8.5 Defeating CacheKit attacks: naïve approaches -- 8.6 Defeating CacheKit attacks: CacheLight -- 8.7 CacheLight implementation -- 8.8 Evaluation -- 8.9 Related work -- 8.10 Future work -- 8.11 Conclusion -- References -- 9. Deep learning network security | Si Wang and Chip-Hong Chang -- 9.1 Introduction -- 9.2 Preliminaries -- 9.3 Misprediction attacks 9.4 Confidentiality attacks -- 9.5 Explainability -- 9.6 Conclusion -- Acknowledgment -- References -- 10. Security implications of non-digital components | Xiaoxi Ren, Zhe Zhou, Di Tang, and Kehuan Zhang -- 10.1 Introduction -- 10.2 Case study 1: Face Flashing-using light reflections to secure liveness detections -- 10.3 Case study 2: Secure mobile payment via imperfection of LCD screens -- 10.4 Conclusion -- References -- 11. Accelerating homomorphic encryption in hardware: a review | Truong Phu Truan Ho and Chip-Hong Chang -- 11.1 Introduction -- 11.2 Fan-Vercauteren (FV) homomorphic encryption scheme -- 11.3 Polynomial multiplication -- 11.4 Residue number system -- 11.5 Hardware accelerators -- 11.6 Conclusion -- References -- 12. Information leakage from robust codes protecting cryptographic primitives | Osnat Keren and Ilia Polian -- 12.1 Introduction -- 12.2 Fault injection attacks -- 12.3 Robust code-based architectures -- 12.4 Security-oriented codes -- 12.5 Information leakage from robust code-based checkers -- Acknowledgment -- References -- Part III. Physical-layer security -- 13. Confidential and energy-efficient cognitive communications by physical-layer security | Pin-Hsun Lin and Eduard A. Jorswieck -- 13.1 Introduction -- 13.2 Preliminaries -- 13.3 Radio resource allocation for EE maximization -- 13.4 Numerical experiments and assessments -- 13.5 Conclusions -- Appendix I: Proof of Proposition 13.5 -- References -- 14. Physical-layer security for mmWave massive MIMO communications in 5G networks | NingWang, Long Jiao, Jie Tang, and Kai Zeng -- 14.1 Physical-layer threats in mmWave massive MIMO -- 14.2 Physical-layer security in mmWave -- 14.3 Physical-layer security in massive MIMO -- 14.4 PLS schemes integratingmmWave massive MIMO with other 5G scenarios and techniques -- Acknowledgment -- References 15. Security of in-vehicle controller area network: a review and future directions | Zhaojun Lu, QianWang, Gang Qu, and Zhenglin Liu -- 15.1 Introduction -- 15.2 Overview of CAN protocol -- 15.3 Vulnerabilities and attack interfaces -- 15.4 Attack models -- 15.5 Countermeasures -- 15.6 Future directions -- 15.7 Conclusions -- References -- Index |
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| dewey-full | 005.8 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 005 - Computer programming, programs, data, security |
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| discipline | Informatik |
| discipline_str_mv | Informatik |
| format | Electronic eBook |
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Design for security -- 4. Hardware obfuscation for IP protection | Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, and Swarup Bhunia -- 4.1 Introduction -- 4.2 Threat models -- 4.3 Hardware obfuscation techniques -- 4.4 Attacks on hardware obfuscation -- 4.5 The trends of hardware obfuscation -- 4.6 Future direction -- 4.7 Summary -- References -- 5. Formal verification for SoC security | Jiaji He, Xialong Guo, Yiqiang Zhao and Yier Jin -- 5.1 Introduction -- 5.2 Related work -- 5.3 Background and preliminary -- 5.4 Methodology -- 5.5 Implementations -- 5.6 Experimental results -- 5.7 Information-flow tracking-based detection -- 5.8 Conclusions -- 5.9 Discussions and future research directions -- References</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">6. 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| id | DE-604.BV047442481 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T18:01:24Z |
| indexdate | 2024-07-10T09:12:16Z |
| institution | BVB |
| isbn | 9781785619281 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032844633 |
| oclc_num | 1226705794 |
| open_access_boolean | |
| owner | DE-706 |
| owner_facet | DE-706 |
| physical | 1 Online-Ressource (445 Seiten) |
| psigel | ZDB-30-PQE ZDB-100-IET ZDB-100-IET UER_Paketkauf |
| publishDate | 2020 |
| publishDateSearch | 2020 |
| publishDateSort | 2020 |
| publisher | The Institution of Engineering & Technology, IET |
| record_format | marc |
| series | IET Materials, Circuits and Devices Series |
| series2 | IET Materials, Circuits and Devices Series |
| spelling | Chang, Chip Hong Verfasser (DE-588)1192843274 aut Frontiers in Hardware Security and Trust Theory, Design and Practice edited by Chip Hong Chang and Yuan Cao Stevenage The Institution of Engineering & Technology, IET 2020 ©2021 1 Online-Ressource (445 Seiten) txt rdacontent c rdamedia cr rdacarrier IET Materials, Circuits and Devices Series 66 Intro -- Contents -- About the editors -- Preface -- Part I. Hardware security threats -- 1. IP/IC piracy threats of reversible circuits | Samah Mohamed Saeed -- 1.1 Introduction -- 1.2 Reversible logic -- 1.3 Motivation and threat model -- 1.4 IP/IC piracy attacks -- 1.5 Countermeasures -- 1.6 Summary -- References -- 2. Improvements and recent updates of persistent fault analysis on block ciphers | Fan Zhang, Bolin Yang, Guorui Xu, Xiaoxuan Lou, Shivam Bhasin, Xinjie Zhao, Shize Guo, and Kui Ren -- 2.1 Introduction -- 2.2 Related works -- 2.3 Persistent fault attack -- 2.4 PFA with multiple faults -- 2.5 Validation of PFA on AES-128 -- 2.6 Defeating fault attack countermeasures with PFA -- 2.7 Case studies: breaking public implementation of masking schemes with single fault -- 2.8 Conclusion -- References -- 3. Deployment of EMC techniques in design of IC chips for hardware security | Makoto Nagata -- 3.1 Overview -- 3.2 EMC simulation technique -- 3.3 SC leakage analysis -- 3.4 Conclusion -- Acknowledgments -- References -- Part II. Design for security -- 4. Hardware obfuscation for IP protection | Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, and Swarup Bhunia -- 4.1 Introduction -- 4.2 Threat models -- 4.3 Hardware obfuscation techniques -- 4.4 Attacks on hardware obfuscation -- 4.5 The trends of hardware obfuscation -- 4.6 Future direction -- 4.7 Summary -- References -- 5. Formal verification for SoC security | Jiaji He, Xialong Guo, Yiqiang Zhao and Yier Jin -- 5.1 Introduction -- 5.2 Related work -- 5.3 Background and preliminary -- 5.4 Methodology -- 5.5 Implementations -- 5.6 Experimental results -- 5.7 Information-flow tracking-based detection -- 5.8 Conclusions -- 5.9 Discussions and future research directions -- References 6. Silicon-based true random number generators | Yuan Cao, Egbochukwu Chukwuemeka Chidiebere, Chenkai Fang, Mingrui Zhou,Wanyi Liu, Xiaojin Zhao, and Chip-Hong Chang -- 6.1 Introduction -- 6.2 Pseudo random number generators -- 6.3 True random number generators -- 6.4 Post-processing -- 6.5 TRNG randomness tests -- 6.6 Conclusion -- Acknowledgments -- References -- 7. Micro-architectural attacks and countermeasures on public-key implementations | Sarani Bhattacharya and Debdeep Mukhopadhyay -- 7.1 Introduction -- 7.2 Related works -- 7.3 Branch-predictor security -- 7.4 Branch misprediction attack -- 7.5 Inserting real-time faults in public-key secret using rowhammer -- 7.6 Fault attack revealing secret keys of exponentiation algorithms from branch prediction misses -- 7.7 Deduce and remove attack on blinded scalar multiplication with asynchronous perf ioctl calls -- 7.8 Extending deduce and remove to a publicly available cryptographic implementation -- 7.9 Online detection and reactive countermeasure for leakage from BPU using TVLA -- 7.10 General mitigation against branch prediction attacks -- 7.11 Existing countermeasures -- 7.12 Conclusion -- Appendix A: Perf handler Code -- Appendix B: RELIC codes -- References -- 8. Mitigating the CACHEKIT attack | Mauricio Gutierrez, Ziming Zhao, Adam Doupé, Yan Shoshitaishvili, and Gail-Joon Ahn -- 8.1 Introduction -- 8.2 Background: ARM, cache, and TrustZone -- 8.3 The Genode operating system framework -- 8.4 Background: CacheKit attack -- 8.5 Defeating CacheKit attacks: naïve approaches -- 8.6 Defeating CacheKit attacks: CacheLight -- 8.7 CacheLight implementation -- 8.8 Evaluation -- 8.9 Related work -- 8.10 Future work -- 8.11 Conclusion -- References -- 9. Deep learning network security | Si Wang and Chip-Hong Chang -- 9.1 Introduction -- 9.2 Preliminaries -- 9.3 Misprediction attacks 9.4 Confidentiality attacks -- 9.5 Explainability -- 9.6 Conclusion -- Acknowledgment -- References -- 10. Security implications of non-digital components | Xiaoxi Ren, Zhe Zhou, Di Tang, and Kehuan Zhang -- 10.1 Introduction -- 10.2 Case study 1: Face Flashing-using light reflections to secure liveness detections -- 10.3 Case study 2: Secure mobile payment via imperfection of LCD screens -- 10.4 Conclusion -- References -- 11. Accelerating homomorphic encryption in hardware: a review | Truong Phu Truan Ho and Chip-Hong Chang -- 11.1 Introduction -- 11.2 Fan-Vercauteren (FV) homomorphic encryption scheme -- 11.3 Polynomial multiplication -- 11.4 Residue number system -- 11.5 Hardware accelerators -- 11.6 Conclusion -- References -- 12. Information leakage from robust codes protecting cryptographic primitives | Osnat Keren and Ilia Polian -- 12.1 Introduction -- 12.2 Fault injection attacks -- 12.3 Robust code-based architectures -- 12.4 Security-oriented codes -- 12.5 Information leakage from robust code-based checkers -- Acknowledgment -- References -- Part III. Physical-layer security -- 13. Confidential and energy-efficient cognitive communications by physical-layer security | Pin-Hsun Lin and Eduard A. Jorswieck -- 13.1 Introduction -- 13.2 Preliminaries -- 13.3 Radio resource allocation for EE maximization -- 13.4 Numerical experiments and assessments -- 13.5 Conclusions -- Appendix I: Proof of Proposition 13.5 -- References -- 14. Physical-layer security for mmWave massive MIMO communications in 5G networks | NingWang, Long Jiao, Jie Tang, and Kai Zeng -- 14.1 Physical-layer threats in mmWave massive MIMO -- 14.2 Physical-layer security in mmWave -- 14.3 Physical-layer security in massive MIMO -- 14.4 PLS schemes integratingmmWave massive MIMO with other 5G scenarios and techniques -- Acknowledgment -- References 15. Security of in-vehicle controller area network: a review and future directions | Zhaojun Lu, QianWang, Gang Qu, and Zhenglin Liu -- 15.1 Introduction -- 15.2 Overview of CAN protocol -- 15.3 Vulnerabilities and attack interfaces -- 15.4 Attack models -- 15.5 Countermeasures -- 15.6 Future directions -- 15.7 Conclusions -- References -- Index This book provides a comprehensive review of emerging security threats and privacy protection issues, and the versatile state-of-the-art hardware-based security countermeasures proposed by the hardware security community. It serves as an advanced reference for researchers on current hardware security problems, challenges and solutions Cao, Yuan Sonstige (DE-588)1169667198 oth Erscheint auch als Druck-Ausgabe 978-1-78561-927-4 IET Materials, Circuits and Devices Series 66 (DE-604)BV044007507 66 |
| spellingShingle | Chang, Chip Hong Frontiers in Hardware Security and Trust Theory, Design and Practice IET Materials, Circuits and Devices Series Intro -- Contents -- About the editors -- Preface -- Part I. Hardware security threats -- 1. IP/IC piracy threats of reversible circuits | Samah Mohamed Saeed -- 1.1 Introduction -- 1.2 Reversible logic -- 1.3 Motivation and threat model -- 1.4 IP/IC piracy attacks -- 1.5 Countermeasures -- 1.6 Summary -- References -- 2. Improvements and recent updates of persistent fault analysis on block ciphers | Fan Zhang, Bolin Yang, Guorui Xu, Xiaoxuan Lou, Shivam Bhasin, Xinjie Zhao, Shize Guo, and Kui Ren -- 2.1 Introduction -- 2.2 Related works -- 2.3 Persistent fault attack -- 2.4 PFA with multiple faults -- 2.5 Validation of PFA on AES-128 -- 2.6 Defeating fault attack countermeasures with PFA -- 2.7 Case studies: breaking public implementation of masking schemes with single fault -- 2.8 Conclusion -- References -- 3. Deployment of EMC techniques in design of IC chips for hardware security | Makoto Nagata -- 3.1 Overview -- 3.2 EMC simulation technique -- 3.3 SC leakage analysis -- 3.4 Conclusion -- Acknowledgments -- References -- Part II. Design for security -- 4. Hardware obfuscation for IP protection | Abdulrahman Alaql, Md Moshiur Rahman, Tamzidul Hoque, and Swarup Bhunia -- 4.1 Introduction -- 4.2 Threat models -- 4.3 Hardware obfuscation techniques -- 4.4 Attacks on hardware obfuscation -- 4.5 The trends of hardware obfuscation -- 4.6 Future direction -- 4.7 Summary -- References -- 5. Formal verification for SoC security | Jiaji He, Xialong Guo, Yiqiang Zhao and Yier Jin -- 5.1 Introduction -- 5.2 Related work -- 5.3 Background and preliminary -- 5.4 Methodology -- 5.5 Implementations -- 5.6 Experimental results -- 5.7 Information-flow tracking-based detection -- 5.8 Conclusions -- 5.9 Discussions and future research directions -- References 6. Silicon-based true random number generators | Yuan Cao, Egbochukwu Chukwuemeka Chidiebere, Chenkai Fang, Mingrui Zhou,Wanyi Liu, Xiaojin Zhao, and Chip-Hong Chang -- 6.1 Introduction -- 6.2 Pseudo random number generators -- 6.3 True random number generators -- 6.4 Post-processing -- 6.5 TRNG randomness tests -- 6.6 Conclusion -- Acknowledgments -- References -- 7. Micro-architectural attacks and countermeasures on public-key implementations | Sarani Bhattacharya and Debdeep Mukhopadhyay -- 7.1 Introduction -- 7.2 Related works -- 7.3 Branch-predictor security -- 7.4 Branch misprediction attack -- 7.5 Inserting real-time faults in public-key secret using rowhammer -- 7.6 Fault attack revealing secret keys of exponentiation algorithms from branch prediction misses -- 7.7 Deduce and remove attack on blinded scalar multiplication with asynchronous perf ioctl calls -- 7.8 Extending deduce and remove to a publicly available cryptographic implementation -- 7.9 Online detection and reactive countermeasure for leakage from BPU using TVLA -- 7.10 General mitigation against branch prediction attacks -- 7.11 Existing countermeasures -- 7.12 Conclusion -- Appendix A: Perf handler Code -- Appendix B: RELIC codes -- References -- 8. Mitigating the CACHEKIT attack | Mauricio Gutierrez, Ziming Zhao, Adam Doupé, Yan Shoshitaishvili, and Gail-Joon Ahn -- 8.1 Introduction -- 8.2 Background: ARM, cache, and TrustZone -- 8.3 The Genode operating system framework -- 8.4 Background: CacheKit attack -- 8.5 Defeating CacheKit attacks: naïve approaches -- 8.6 Defeating CacheKit attacks: CacheLight -- 8.7 CacheLight implementation -- 8.8 Evaluation -- 8.9 Related work -- 8.10 Future work -- 8.11 Conclusion -- References -- 9. Deep learning network security | Si Wang and Chip-Hong Chang -- 9.1 Introduction -- 9.2 Preliminaries -- 9.3 Misprediction attacks 9.4 Confidentiality attacks -- 9.5 Explainability -- 9.6 Conclusion -- Acknowledgment -- References -- 10. Security implications of non-digital components | Xiaoxi Ren, Zhe Zhou, Di Tang, and Kehuan Zhang -- 10.1 Introduction -- 10.2 Case study 1: Face Flashing-using light reflections to secure liveness detections -- 10.3 Case study 2: Secure mobile payment via imperfection of LCD screens -- 10.4 Conclusion -- References -- 11. Accelerating homomorphic encryption in hardware: a review | Truong Phu Truan Ho and Chip-Hong Chang -- 11.1 Introduction -- 11.2 Fan-Vercauteren (FV) homomorphic encryption scheme -- 11.3 Polynomial multiplication -- 11.4 Residue number system -- 11.5 Hardware accelerators -- 11.6 Conclusion -- References -- 12. Information leakage from robust codes protecting cryptographic primitives | Osnat Keren and Ilia Polian -- 12.1 Introduction -- 12.2 Fault injection attacks -- 12.3 Robust code-based architectures -- 12.4 Security-oriented codes -- 12.5 Information leakage from robust code-based checkers -- Acknowledgment -- References -- Part III. Physical-layer security -- 13. Confidential and energy-efficient cognitive communications by physical-layer security | Pin-Hsun Lin and Eduard A. Jorswieck -- 13.1 Introduction -- 13.2 Preliminaries -- 13.3 Radio resource allocation for EE maximization -- 13.4 Numerical experiments and assessments -- 13.5 Conclusions -- Appendix I: Proof of Proposition 13.5 -- References -- 14. Physical-layer security for mmWave massive MIMO communications in 5G networks | NingWang, Long Jiao, Jie Tang, and Kai Zeng -- 14.1 Physical-layer threats in mmWave massive MIMO -- 14.2 Physical-layer security in mmWave -- 14.3 Physical-layer security in massive MIMO -- 14.4 PLS schemes integratingmmWave massive MIMO with other 5G scenarios and techniques -- Acknowledgment -- References 15. Security of in-vehicle controller area network: a review and future directions | Zhaojun Lu, QianWang, Gang Qu, and Zhenglin Liu -- 15.1 Introduction -- 15.2 Overview of CAN protocol -- 15.3 Vulnerabilities and attack interfaces -- 15.4 Attack models -- 15.5 Countermeasures -- 15.6 Future directions -- 15.7 Conclusions -- References -- Index |
| title | Frontiers in Hardware Security and Trust Theory, Design and Practice |
| title_auth | Frontiers in Hardware Security and Trust Theory, Design and Practice |
| title_exact_search | Frontiers in Hardware Security and Trust Theory, Design and Practice |
| title_exact_search_txtP | Frontiers in Hardware Security and Trust Theory, Design and Practice |
| title_full | Frontiers in Hardware Security and Trust Theory, Design and Practice edited by Chip Hong Chang and Yuan Cao |
| title_fullStr | Frontiers in Hardware Security and Trust Theory, Design and Practice edited by Chip Hong Chang and Yuan Cao |
| title_full_unstemmed | Frontiers in Hardware Security and Trust Theory, Design and Practice edited by Chip Hong Chang and Yuan Cao |
| title_short | Frontiers in Hardware Security and Trust |
| title_sort | frontiers in hardware security and trust theory design and practice |
| title_sub | Theory, Design and Practice |
| volume_link | (DE-604)BV044007507 |
| work_keys_str_mv | AT changchiphong frontiersinhardwaresecurityandtrusttheorydesignandpractice AT caoyuan frontiersinhardwaresecurityandtrusttheorydesignandpractice |