Formal Methods and Models for System Design: A System Level Perspective
Perhaps nothing characterizes the inherent heterogeneity in embedded sys tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre sent a careful division and design of hardware and software parts of...
Gespeichert in:
| Weitere Verfasser: | , , , |
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
New York, NY
Springer US
2004
|
| Ausgabe: | 1st ed. 2004 |
| Schlagworte: | |
| Online-Zugang: | UBY01 Volltext |
| Zusammenfassung: | Perhaps nothing characterizes the inherent heterogeneity in embedded sys tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre sent a careful division and design of hardware and software parts of the system To do this task effectively, models and methods are necessary functionality. to capture application behavior, needs and system implementation constraints. Formal modeling can be valuable in addressing these tasks. As with most engineering domains, co-design practice defines the state of the it seeks to add new capabilities in system conceptualization, mod art, though eling, optimization and implementation. These advances -particularly those related to synthesis and verification tasks -direct1y depend upon formal under standing of system behavior and performance measures. Current practice in system modeling relies upon exploiting high-level programming frameworks, such as SystemC, EstereI, to capture design at increasingly higher levels of ab straction and attempts to reduce the system implementation task. While raising the abstraction levels for design and verification tasks, to be really useful, these approaches must also provide for reuse, adaptation of the existing intellectual property (IP) blocks |
| Beschreibung: | 1 Online-Ressource (IX, 372 p. 65 illus) |
| ISBN: | 9781402080524 |
| DOI: | 10.1007/978-1-4020-8052-4 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV047064052 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 201216s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 9781402080524 |9 978-1-4020-8052-4 | ||
| 024 | 7 | |a 10.1007/978-1-4020-8052-4 |2 doi | |
| 035 | |a (ZDB-2-SCS)978-1-4020-8052-4 | ||
| 035 | |a (OCoLC)1227481892 | ||
| 035 | |a (DE-599)BVBBV047064052 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-706 | ||
| 082 | 0 | |a 004.0151 |2 23 | |
| 245 | 1 | 0 | |a Formal Methods and Models for System Design |b A System Level Perspective |c edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin |
| 250 | |a 1st ed. 2004 | ||
| 264 | 1 | |a New York, NY |b Springer US |c 2004 | |
| 300 | |a 1 Online-Ressource (IX, 372 p. 65 illus) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 520 | |a Perhaps nothing characterizes the inherent heterogeneity in embedded sys tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre sent a careful division and design of hardware and software parts of the system To do this task effectively, models and methods are necessary functionality. to capture application behavior, needs and system implementation constraints. Formal modeling can be valuable in addressing these tasks. As with most engineering domains, co-design practice defines the state of the it seeks to add new capabilities in system conceptualization, mod art, though eling, optimization and implementation. These advances -particularly those related to synthesis and verification tasks -direct1y depend upon formal under standing of system behavior and performance measures. Current practice in system modeling relies upon exploiting high-level programming frameworks, such as SystemC, EstereI, to capture design at increasingly higher levels of ab straction and attempts to reduce the system implementation task. While raising the abstraction levels for design and verification tasks, to be really useful, these approaches must also provide for reuse, adaptation of the existing intellectual property (IP) blocks | ||
| 650 | 4 | |a Theory of Computation | |
| 650 | 4 | |a Control and Systems Theory | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Artificial Intelligence | |
| 650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Computers | |
| 650 | 4 | |a Control engineering | |
| 650 | 4 | |a Electronic circuits | |
| 650 | 4 | |a Artificial intelligence | |
| 650 | 4 | |a Computer-aided engineering | |
| 650 | 4 | |a Electrical engineering | |
| 700 | 1 | |a Gupta, Rajesh |4 edt | |
| 700 | 1 | |a Le Guernic, Paul |4 edt | |
| 700 | 1 | |a Shukla, Sandeep Kumar |4 edt | |
| 700 | 1 | |a Talpin, Jean-Pierre |4 edt | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781441954640 |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781402080517 |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781475710786 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4020-8052-4 |x Verlag |z URL des Eerstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-SCS | ||
| 940 | 1 | |q ZDB-2-SCS_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-032471164 | ||
| 966 | e | |u https://doi.org/10.1007/978-1-4020-8052-4 |l UBY01 |p ZDB-2-SCS |q ZDB-2-SCS_2000/2004 |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804182061576093696 |
|---|---|
| adam_txt | |
| any_adam_object | |
| any_adam_object_boolean | |
| author2 | Gupta, Rajesh Le Guernic, Paul Shukla, Sandeep Kumar Talpin, Jean-Pierre |
| author2_role | edt edt edt edt |
| author2_variant | r g rg g p l gp gpl s k s sk sks j p t jpt |
| author_facet | Gupta, Rajesh Le Guernic, Paul Shukla, Sandeep Kumar Talpin, Jean-Pierre |
| building | Verbundindex |
| bvnumber | BV047064052 |
| collection | ZDB-2-SCS |
| ctrlnum | (ZDB-2-SCS)978-1-4020-8052-4 (OCoLC)1227481892 (DE-599)BVBBV047064052 |
| dewey-full | 004.0151 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004.0151 |
| dewey-search | 004.0151 |
| dewey-sort | 14.0151 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| discipline_str_mv | Informatik |
| doi_str_mv | 10.1007/978-1-4020-8052-4 |
| edition | 1st ed. 2004 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03418nmm a2200577zc 4500</leader><controlfield tag="001">BV047064052</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">201216s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402080524</subfield><subfield code="9">978-1-4020-8052-4</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4020-8052-4</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-SCS)978-1-4020-8052-4</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1227481892</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV047064052</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-706</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">004.0151</subfield><subfield code="2">23</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Formal Methods and Models for System Design</subfield><subfield code="b">A System Level Perspective</subfield><subfield code="c">edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">1st ed. 2004</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">New York, NY</subfield><subfield code="b">Springer US</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (IX, 372 p. 65 illus)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Perhaps nothing characterizes the inherent heterogeneity in embedded sys tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre sent a careful division and design of hardware and software parts of the system To do this task effectively, models and methods are necessary functionality. to capture application behavior, needs and system implementation constraints. Formal modeling can be valuable in addressing these tasks. As with most engineering domains, co-design practice defines the state of the it seeks to add new capabilities in system conceptualization, mod art, though eling, optimization and implementation. These advances -particularly those related to synthesis and verification tasks -direct1y depend upon formal under standing of system behavior and performance measures. Current practice in system modeling relies upon exploiting high-level programming frameworks, such as SystemC, EstereI, to capture design at increasingly higher levels of ab straction and attempts to reduce the system implementation task. While raising the abstraction levels for design and verification tasks, to be really useful, these approaches must also provide for reuse, adaptation of the existing intellectual property (IP) blocks</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Theory of Computation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Control and Systems Theory</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Artificial Intelligence</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computers</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Control engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Artificial intelligence</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gupta, Rajesh</subfield><subfield code="4">edt</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Le Guernic, Paul</subfield><subfield code="4">edt</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Shukla, Sandeep Kumar</subfield><subfield code="4">edt</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Talpin, Jean-Pierre</subfield><subfield code="4">edt</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781441954640</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781402080517</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781475710786</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4020-8052-4</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Eerstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-SCS</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-SCS_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-032471164</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4020-8052-4</subfield><subfield code="l">UBY01</subfield><subfield code="p">ZDB-2-SCS</subfield><subfield code="q">ZDB-2-SCS_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV047064052 |
| illustrated | Not Illustrated |
| index_date | 2024-07-03T16:12:21Z |
| indexdate | 2024-07-10T09:01:34Z |
| institution | BVB |
| isbn | 9781402080524 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-032471164 |
| oclc_num | 1227481892 |
| open_access_boolean | |
| owner | DE-706 |
| owner_facet | DE-706 |
| physical | 1 Online-Ressource (IX, 372 p. 65 illus) |
| psigel | ZDB-2-SCS ZDB-2-SCS_2000/2004 ZDB-2-SCS ZDB-2-SCS_2000/2004 |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Springer US |
| record_format | marc |
| spelling | Formal Methods and Models for System Design A System Level Perspective edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin 1st ed. 2004 New York, NY Springer US 2004 1 Online-Ressource (IX, 372 p. 65 illus) txt rdacontent c rdamedia cr rdacarrier Perhaps nothing characterizes the inherent heterogeneity in embedded sys tems than the ability to choose between hardware and software implementations of a given system function. Indeed, most embedded systems at their core repre sent a careful division and design of hardware and software parts of the system To do this task effectively, models and methods are necessary functionality. to capture application behavior, needs and system implementation constraints. Formal modeling can be valuable in addressing these tasks. As with most engineering domains, co-design practice defines the state of the it seeks to add new capabilities in system conceptualization, mod art, though eling, optimization and implementation. These advances -particularly those related to synthesis and verification tasks -direct1y depend upon formal under standing of system behavior and performance measures. Current practice in system modeling relies upon exploiting high-level programming frameworks, such as SystemC, EstereI, to capture design at increasingly higher levels of ab straction and attempts to reduce the system implementation task. While raising the abstraction levels for design and verification tasks, to be really useful, these approaches must also provide for reuse, adaptation of the existing intellectual property (IP) blocks Theory of Computation Control and Systems Theory Circuits and Systems Artificial Intelligence Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Computers Control engineering Electronic circuits Artificial intelligence Computer-aided engineering Electrical engineering Gupta, Rajesh edt Le Guernic, Paul edt Shukla, Sandeep Kumar edt Talpin, Jean-Pierre edt Erscheint auch als Druck-Ausgabe 9781441954640 Erscheint auch als Druck-Ausgabe 9781402080517 Erscheint auch als Druck-Ausgabe 9781475710786 https://doi.org/10.1007/978-1-4020-8052-4 Verlag URL des Eerstveröffentlichers Volltext |
| spellingShingle | Formal Methods and Models for System Design A System Level Perspective Theory of Computation Control and Systems Theory Circuits and Systems Artificial Intelligence Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Computers Control engineering Electronic circuits Artificial intelligence Computer-aided engineering Electrical engineering |
| title | Formal Methods and Models for System Design A System Level Perspective |
| title_auth | Formal Methods and Models for System Design A System Level Perspective |
| title_exact_search | Formal Methods and Models for System Design A System Level Perspective |
| title_exact_search_txtP | Formal Methods and Models for System Design A System Level Perspective |
| title_full | Formal Methods and Models for System Design A System Level Perspective edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin |
| title_fullStr | Formal Methods and Models for System Design A System Level Perspective edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin |
| title_full_unstemmed | Formal Methods and Models for System Design A System Level Perspective edited by Rajesh Gupta, Paul Le Guernic, Sandeep Kumar Shukla, Jean-Pierre Talpin |
| title_short | Formal Methods and Models for System Design |
| title_sort | formal methods and models for system design a system level perspective |
| title_sub | A System Level Perspective |
| topic | Theory of Computation Control and Systems Theory Circuits and Systems Artificial Intelligence Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Computers Control engineering Electronic circuits Artificial intelligence Computer-aided engineering Electrical engineering |
| topic_facet | Theory of Computation Control and Systems Theory Circuits and Systems Artificial Intelligence Computer-Aided Engineering (CAD, CAE) and Design Electrical Engineering Computers Control engineering Electronic circuits Artificial intelligence Computer-aided engineering Electrical engineering |
| url | https://doi.org/10.1007/978-1-4020-8052-4 |
| work_keys_str_mv | AT guptarajesh formalmethodsandmodelsforsystemdesignasystemlevelperspective AT leguernicpaul formalmethodsandmodelsforsystemdesignasystemlevelperspective AT shuklasandeepkumar formalmethodsandmodelsforsystemdesignasystemlevelperspective AT talpinjeanpierre formalmethodsandmodelsforsystemdesignasystemlevelperspective |