APA (7th ed.) Citation

Taraate, V. (2020). SystemVerilog for hardware description: RTL Design and verification. Springer.

Chicago Style (17th ed.) Citation

Taraate, Vaibbhav. SystemVerilog for Hardware Description: RTL Design and Verification. Singapore: Springer, 2020.

MLA (9th ed.) Citation

Taraate, Vaibbhav. SystemVerilog for Hardware Description: RTL Design and Verification. Springer, 2020.

Warning: These citations may not always be 100% accurate.