ESL design and verification: a prescription for electronic system-level methodology
Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is e...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Amsterdam Boston
Morgan Kaufmann
© 2007
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Schriftenreihe: | Morgan Kaufmann series in systems on silicon
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Schlagworte: | |
Online-Zugang: | FLA01 Volltext |
Zusammenfassung: | Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts |
Beschreibung: | Includes bibliographical references and index |
Beschreibung: | 1 online resource (xxv, 462 pages) illustrations |
ISBN: | 9780080488837 0080488838 |
Internformat
MARC
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490 | 0 | |a Morgan Kaufmann series in systems on silicon | |
500 | |a Includes bibliographical references and index | ||
520 | |a Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts | ||
650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated |2 bisacsh | |
650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / General |2 bisacsh | |
650 | 7 | |a Systems on a chip / Design and construction |2 blmlsh | |
650 | 7 | |a Systems on a chip / Design and construction |2 fast | |
650 | 4 | |a Systems on a chip / Design and construction | |
650 | 4 | |a Systems on a chip |x Design and construction | |
650 | 0 | 7 | |a Verifikation |0 (DE-588)4135577-5 |2 gnd |9 rswk-swf |
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650 | 0 | 7 | |a System-on-Chip |0 (DE-588)4740357-3 |2 gnd |9 rswk-swf |
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Datensatz im Suchindex
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---|---|
any_adam_object | |
author | Bailey, Brian 1959- |
author_GND | (DE-588)1146844212 |
author_facet | Bailey, Brian 1959- |
author_role | aut |
author_sort | Bailey, Brian 1959- |
author_variant | b b bb |
building | Verbundindex |
bvnumber | BV046123905 |
classification_rvk | ZN 5600 ZN 5680 |
collection | ZDB-33-ESD |
ctrlnum | (ZDB-33-ESD)ocn146316668 (OCoLC)146316668 (DE-599)BVBBV046123905 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Electronic eBook |
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id | DE-604.BV046123905 |
illustrated | Illustrated |
indexdate | 2024-07-10T08:35:49Z |
institution | BVB |
isbn | 9780080488837 0080488838 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-031504358 |
oclc_num | 146316668 |
open_access_boolean | |
physical | 1 online resource (xxv, 462 pages) illustrations |
psigel | ZDB-33-ESD ZDB-33-ESD FLA_PDA_ESD |
publishDate | 2007 |
publishDateSearch | 2007 |
publishDateSort | 2007 |
publisher | Morgan Kaufmann |
record_format | marc |
series2 | Morgan Kaufmann series in systems on silicon |
spelling | Bailey, Brian 1959- Verfasser (DE-588)1146844212 aut ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali Electronic system-level design Amsterdam Boston Morgan Kaufmann © 2007 1 online resource (xxv, 462 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Morgan Kaufmann series in systems on silicon Includes bibliographical references and index Electronic System Level (ESL) design has mainstreamed it is now an established approach at most of the worlds leading system-on-chip (SoC) design companies and is being used increasingly in system design. From its genesis as an algorithm modeling methodology with no links to implementation, ESL is evolving into a set of complementary methodologies that enable embedded system design, verification and debug through to the hardware and software implementation of custom SoC, system-on-FPGA, system-on-board, and entire multi-board systems. This book arises from experience the authors have gained from years of work as industry practitioners in the Electronic System Level design area; they have seen "SLD" or "ESL" go through many stages and false starts, and have observed that the shift in design methodologies to ESL is finally occurring. This is partly because of ESL technologies themselves are stabilizing on a useful set of languages being standardized (SystemC is the most notable), and use models are being identified that are beginning to get real adoption. ESL DESIGN & VERIFICATION offers a true prescriptive guide to ESL that reviews its past and outlines the best practices of today. Visit the authors' companion site! http://www.electronicsystemlevel.com/ * Provides broad, comprehensive coverage not available in any other such book * Massive global appeal with an internationally recognised author team * Crammed full of state of the art content from notable industry experts TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip / Design and construction Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd rswk-swf Systementwurf (DE-588)4261480-6 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf System-on-Chip (DE-588)4740357-3 s Systementwurf (DE-588)4261480-6 s Verifikation (DE-588)4135577-5 s 1\p DE-604 Martin, Grant Sonstige oth Piziali, Andrew Sonstige oth Erscheint auch als Druck-Ausgabe 0123735513 Erscheint auch als Druck-Ausgabe 9780123735515 http://www.sciencedirect.com/science/book/9780123735515 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Bailey, Brian 1959- ESL design and verification a prescription for electronic system-level methodology TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip / Design and construction Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd System-on-Chip (DE-588)4740357-3 gnd |
subject_GND | (DE-588)4135577-5 (DE-588)4261480-6 (DE-588)4740357-3 |
title | ESL design and verification a prescription for electronic system-level methodology |
title_alt | Electronic system-level design |
title_auth | ESL design and verification a prescription for electronic system-level methodology |
title_exact_search | ESL design and verification a prescription for electronic system-level methodology |
title_full | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
title_fullStr | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
title_full_unstemmed | ESL design and verification a prescription for electronic system-level methodology Brian Bailey, Grant Martin, Andrew Piziali |
title_short | ESL design and verification |
title_sort | esl design and verification a prescription for electronic system level methodology |
title_sub | a prescription for electronic system-level methodology |
topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Systems on a chip / Design and construction blmlsh Systems on a chip / Design and construction fast Systems on a chip / Design and construction Systems on a chip Design and construction Verifikation (DE-588)4135577-5 gnd Systementwurf (DE-588)4261480-6 gnd System-on-Chip (DE-588)4740357-3 gnd |
topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated TECHNOLOGY & ENGINEERING / Electronics / Circuits / General Systems on a chip / Design and construction Systems on a chip Design and construction Verifikation Systementwurf System-on-Chip |
url | http://www.sciencedirect.com/science/book/9780123735515 |
work_keys_str_mv | AT baileybrian esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT martingrant esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT pizialiandrew esldesignandverificationaprescriptionforelectronicsystemlevelmethodology AT baileybrian electronicsystemleveldesign AT martingrant electronicsystemleveldesign AT pizialiandrew electronicsystemleveldesign |