Synchronization and arbitration in digital systems:
Saved in:
| Main Author: | |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Hoboken, NJ
J. Wiley & Sons
2007
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| Subjects: | |
| Item Description: | Print version record |
| Physical Description: | 1 online resource (xvi, 263 pages) illustrations |
| ISBN: | 9780470517130 0470517131 9780470517147 047051714X 1281318221 9781281318220 |
Staff View
MARC
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| 100 | 1 | |a Kinniment, David |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Synchronization and arbitration in digital systems |c David Kinniment |
| 264 | 1 | |a Hoboken, NJ |b J. Wiley & Sons |c 2007 | |
| 300 | |a 1 online resource (xvi, 263 pages) |b illustrations | ||
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| 505 | 8 | |a Today's networks of processors on and off chip, operating with independent clocks, need effective synchronization of the data passing between them for reliability. When two or more processors request access to a common resource, such as a memory, an arbiter has to decide which request to deal with first. Current developments in integrated circuit processing are leading to an increase in the numbers of independent digital processing elements in a single system. With this comes faster communications, more networks on chip, and the demand for more reliable, more complex, and higher performance synchronizers and arbiters. Written by one of the foremost researchers in this area of digital design, this authoritative text provides in-depth theory and practical design solutions for the reliable working of synchronization and arbitration hardware in digital systems. | |
| 505 | 8 | |a This book provides methods for making real reliability measurements both on and off chip, evaluating some of the common difficulties and detailing circuit solutions at both circuit and system levels. | |
| 505 | 8 | |a "Synchronization and Arbitration in Digital Systems" also presents: mathematical models used to estimate mean time between failures in digital systems; a summary of serial and parallel communication techniques for on-chip data transmission; explanations on how to design a wrapper for a locally synchronous cell, highlighting the issues associated with stoppable clocks; an examination of various types of priority arbiters, using signal transition graphs to show the specification of different designs (from the simplest to more complex multi-way arbiters) including ways of solving problems encountered in a wide range of applications; and, essential information on systems composed of independently timed regions, including a discussion on the problem of choice and the factors affecting the time taken to make choices in electronics. | |
| 505 | 8 | |a With its logical approach to design methodology, this will prove an invaluable guide for electronic and computer engineers and researchers working on the design of digital electronic hardware. Postgraduates and senior undergraduate students studying digital systems design as part of their electronic engineering course will struggle to find a resource that better details the information given inside this book | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated |2 bisacsh | |
| 650 | 7 | |a TECHNOLOGY & ENGINEERING / Electronics / Circuits / General |2 bisacsh | |
| 650 | 7 | |a Digital integrated circuits / Design and construction |2 fast | |
| 650 | 7 | |a Synchronization |2 fast | |
| 650 | 7 | |a Timing circuits / Design and construction |2 fast | |
| 650 | 4 | |a Timing circuits |x Design and construction |a Digital integrated circuits |x Design and construction |a Synchronization | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |a Kinniment, David |t Synchronization and arbitration in digital systems |d Hoboken, NJ : J. Wiley & Sons, 2007 |z 9780470510827 |z 047051082X |
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Record in the Search Index
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| author | Kinniment, David |
| author_facet | Kinniment, David |
| author_role | aut |
| author_sort | Kinniment, David |
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| contents | Today's networks of processors on and off chip, operating with independent clocks, need effective synchronization of the data passing between them for reliability. When two or more processors request access to a common resource, such as a memory, an arbiter has to decide which request to deal with first. Current developments in integrated circuit processing are leading to an increase in the numbers of independent digital processing elements in a single system. With this comes faster communications, more networks on chip, and the demand for more reliable, more complex, and higher performance synchronizers and arbiters. Written by one of the foremost researchers in this area of digital design, this authoritative text provides in-depth theory and practical design solutions for the reliable working of synchronization and arbitration hardware in digital systems. This book provides methods for making real reliability measurements both on and off chip, evaluating some of the common difficulties and detailing circuit solutions at both circuit and system levels. "Synchronization and Arbitration in Digital Systems" also presents: mathematical models used to estimate mean time between failures in digital systems; a summary of serial and parallel communication techniques for on-chip data transmission; explanations on how to design a wrapper for a locally synchronous cell, highlighting the issues associated with stoppable clocks; an examination of various types of priority arbiters, using signal transition graphs to show the specification of different designs (from the simplest to more complex multi-way arbiters) including ways of solving problems encountered in a wide range of applications; and, essential information on systems composed of independently timed regions, including a discussion on the problem of choice and the factors affecting the time taken to make choices in electronics. With its logical approach to design methodology, this will prove an invaluable guide for electronic and computer engineers and researchers working on the design of digital electronic hardware. Postgraduates and senior undergraduate students studying digital systems design as part of their electronic engineering course will struggle to find a resource that better details the information given inside this book |
| ctrlnum | (ZDB-4-ENC)ocn243743345 (OCoLC)243743345 (DE-599)BVBBV045342721 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic eBook |
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| illustrated | Illustrated |
| indexdate | 2024-07-10T08:15:27Z |
| institution | BVB |
| isbn | 9780470517130 0470517131 9780470517147 047051714X 1281318221 9781281318220 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030729424 |
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| physical | 1 online resource (xvi, 263 pages) illustrations |
| psigel | ZDB-4-ENC |
| publishDate | 2007 |
| publishDateSearch | 2007 |
| publishDateSort | 2007 |
| publisher | J. Wiley & Sons |
| record_format | marc |
| spelling | Kinniment, David Verfasser aut Synchronization and arbitration in digital systems David Kinniment Hoboken, NJ J. Wiley & Sons 2007 1 online resource (xvi, 263 pages) illustrations txt rdacontent c rdamedia cr rdacarrier Print version record Today's networks of processors on and off chip, operating with independent clocks, need effective synchronization of the data passing between them for reliability. When two or more processors request access to a common resource, such as a memory, an arbiter has to decide which request to deal with first. Current developments in integrated circuit processing are leading to an increase in the numbers of independent digital processing elements in a single system. With this comes faster communications, more networks on chip, and the demand for more reliable, more complex, and higher performance synchronizers and arbiters. Written by one of the foremost researchers in this area of digital design, this authoritative text provides in-depth theory and practical design solutions for the reliable working of synchronization and arbitration hardware in digital systems. This book provides methods for making real reliability measurements both on and off chip, evaluating some of the common difficulties and detailing circuit solutions at both circuit and system levels. "Synchronization and Arbitration in Digital Systems" also presents: mathematical models used to estimate mean time between failures in digital systems; a summary of serial and parallel communication techniques for on-chip data transmission; explanations on how to design a wrapper for a locally synchronous cell, highlighting the issues associated with stoppable clocks; an examination of various types of priority arbiters, using signal transition graphs to show the specification of different designs (from the simplest to more complex multi-way arbiters) including ways of solving problems encountered in a wide range of applications; and, essential information on systems composed of independently timed regions, including a discussion on the problem of choice and the factors affecting the time taken to make choices in electronics. With its logical approach to design methodology, this will prove an invaluable guide for electronic and computer engineers and researchers working on the design of digital electronic hardware. Postgraduates and senior undergraduate students studying digital systems design as part of their electronic engineering course will struggle to find a resource that better details the information given inside this book TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Digital integrated circuits / Design and construction fast Synchronization fast Timing circuits / Design and construction fast Timing circuits Design and construction Digital integrated circuits Design and construction Synchronization Erscheint auch als Druck-Ausgabe Kinniment, David Synchronization and arbitration in digital systems Hoboken, NJ : J. Wiley & Sons, 2007 9780470510827 047051082X |
| spellingShingle | Kinniment, David Synchronization and arbitration in digital systems Today's networks of processors on and off chip, operating with independent clocks, need effective synchronization of the data passing between them for reliability. When two or more processors request access to a common resource, such as a memory, an arbiter has to decide which request to deal with first. Current developments in integrated circuit processing are leading to an increase in the numbers of independent digital processing elements in a single system. With this comes faster communications, more networks on chip, and the demand for more reliable, more complex, and higher performance synchronizers and arbiters. Written by one of the foremost researchers in this area of digital design, this authoritative text provides in-depth theory and practical design solutions for the reliable working of synchronization and arbitration hardware in digital systems. This book provides methods for making real reliability measurements both on and off chip, evaluating some of the common difficulties and detailing circuit solutions at both circuit and system levels. "Synchronization and Arbitration in Digital Systems" also presents: mathematical models used to estimate mean time between failures in digital systems; a summary of serial and parallel communication techniques for on-chip data transmission; explanations on how to design a wrapper for a locally synchronous cell, highlighting the issues associated with stoppable clocks; an examination of various types of priority arbiters, using signal transition graphs to show the specification of different designs (from the simplest to more complex multi-way arbiters) including ways of solving problems encountered in a wide range of applications; and, essential information on systems composed of independently timed regions, including a discussion on the problem of choice and the factors affecting the time taken to make choices in electronics. With its logical approach to design methodology, this will prove an invaluable guide for electronic and computer engineers and researchers working on the design of digital electronic hardware. Postgraduates and senior undergraduate students studying digital systems design as part of their electronic engineering course will struggle to find a resource that better details the information given inside this book TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Digital integrated circuits / Design and construction fast Synchronization fast Timing circuits / Design and construction fast Timing circuits Design and construction Digital integrated circuits Design and construction Synchronization |
| title | Synchronization and arbitration in digital systems |
| title_auth | Synchronization and arbitration in digital systems |
| title_exact_search | Synchronization and arbitration in digital systems |
| title_full | Synchronization and arbitration in digital systems David Kinniment |
| title_fullStr | Synchronization and arbitration in digital systems David Kinniment |
| title_full_unstemmed | Synchronization and arbitration in digital systems David Kinniment |
| title_short | Synchronization and arbitration in digital systems |
| title_sort | synchronization and arbitration in digital systems |
| topic | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated bisacsh TECHNOLOGY & ENGINEERING / Electronics / Circuits / General bisacsh Digital integrated circuits / Design and construction fast Synchronization fast Timing circuits / Design and construction fast Timing circuits Design and construction Digital integrated circuits Design and construction Synchronization |
| topic_facet | TECHNOLOGY & ENGINEERING / Electronics / Circuits / Integrated TECHNOLOGY & ENGINEERING / Electronics / Circuits / General Digital integrated circuits / Design and construction Synchronization Timing circuits / Design and construction Timing circuits Design and construction Digital integrated circuits Design and construction Synchronization |
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