High-Level Synthesis for Real-Time Digital Signal Processing:
High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compil...
Gespeichert in:
Hauptverfasser: | , , , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1993
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Schriftenreihe: | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
216 |
Schlagworte: | |
Online-Zugang: | BTU01 Volltext |
Zusammenfassung: | High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book |
Beschreibung: | 1 Online-Ressource (VIII, 302 p) |
ISBN: | 9781475722222 |
DOI: | 10.1007/978-1-4757-2222-2 |
Internformat
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520 | |a High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book | ||
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any_adam_object | |
author | Vanhoof, Jan Rompaey, Karl Van Bolsens, Ivo Goossens, Gert |
author_facet | Vanhoof, Jan Rompaey, Karl Van Bolsens, Ivo Goossens, Gert |
author_role | aut aut aut aut |
author_sort | Vanhoof, Jan |
author_variant | j v jv k v r kv kvr i b ib g g gg |
building | Verbundindex |
bvnumber | BV045187353 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-1-4757-2222-2 (OCoLC)1184491811 (DE-599)BVBBV045187353 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4757-2222-2 |
format | Electronic eBook |
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id | DE-604.BV045187353 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:59Z |
institution | BVB |
isbn | 9781475722222 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030576530 |
oclc_num | 1184491811 |
open_access_boolean | |
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owner_facet | DE-634 |
physical | 1 Online-Ressource (VIII, 302 p) |
psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
publishDate | 1993 |
publishDateSearch | 1993 |
publishDateSort | 1993 |
publisher | Springer US |
record_format | marc |
series2 | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
spelling | Vanhoof, Jan Verfasser aut High-Level Synthesis for Real-Time Digital Signal Processing by Jan Vanhoof, Karl Van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man Boston, MA Springer US 1993 1 Online-Ressource (VIII, 302 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 216 High-Level Synthesis for Real-Time Digital Signal Processing is a comprehensive reference work for researchers and practicing ASIC design engineers. It focuses on methods for compiling complex, low to medium throughput DSP system, and on the implementation of these methods in the CATHEDRAL-II compiler. The emergence of independent silicon foundries, the reduced price of silicon real estate and the shortened processing turn-around time bring silicon technology within reach of system houses. Even for low volumes, digital systems on application-specific integrated circuits (ASICs) are becoming an economically meaningful alternative for traditional boards with analogue and digital commodity chips. ASICs cover the application region where inefficiencies inherent to general-purpose components cannot be tolerated. However, full-custom handcrafted ASIC design is often not affordable in this competitive market. Long design times, a high development cost for a low production volume, the lack of silicon designers and the lack of suited design facilities are inherent difficulties to manual full-custom chip design. To overcome these drawbacks, complex systems have to be integrated in ASICs much faster and without losing too much efficiency in silicon area and operation speed compared to handcrafted chips. The gap between system design and silicon design can only be bridged by new design (CAD). The idea of a silicon compiler, translating a behavioural system specification directly into silicon, was born from the awareness that the ability to fabricate chips is indeed outrunning the ability to design them. At this moment, CAD is one order of magnitude behind schedule. Conceptual CAD is the keyword to mastering the design complexity in ASIC design and the topic of this book Engineering Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Digitale Signalverarbeitung (DE-588)4113314-6 gnd rswk-swf Silicon-Compiler (DE-588)4209036-2 gnd rswk-swf Silicon-Compiler (DE-588)4209036-2 s Digitale Signalverarbeitung (DE-588)4113314-6 s 1\p DE-604 Rompaey, Karl Van aut Bolsens, Ivo aut Goossens, Gert aut Erscheint auch als Druck-Ausgabe 9781441951342 https://doi.org/10.1007/978-1-4757-2222-2 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Vanhoof, Jan Rompaey, Karl Van Bolsens, Ivo Goossens, Gert High-Level Synthesis for Real-Time Digital Signal Processing Engineering Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Digitale Signalverarbeitung (DE-588)4113314-6 gnd Silicon-Compiler (DE-588)4209036-2 gnd |
subject_GND | (DE-588)4113314-6 (DE-588)4209036-2 |
title | High-Level Synthesis for Real-Time Digital Signal Processing |
title_auth | High-Level Synthesis for Real-Time Digital Signal Processing |
title_exact_search | High-Level Synthesis for Real-Time Digital Signal Processing |
title_full | High-Level Synthesis for Real-Time Digital Signal Processing by Jan Vanhoof, Karl Van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man |
title_fullStr | High-Level Synthesis for Real-Time Digital Signal Processing by Jan Vanhoof, Karl Van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man |
title_full_unstemmed | High-Level Synthesis for Real-Time Digital Signal Processing by Jan Vanhoof, Karl Van Rompaey, Ivo Bolsens, Gert Goossens, Hugo De Man |
title_short | High-Level Synthesis for Real-Time Digital Signal Processing |
title_sort | high level synthesis for real time digital signal processing |
topic | Engineering Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Digitale Signalverarbeitung (DE-588)4113314-6 gnd Silicon-Compiler (DE-588)4209036-2 gnd |
topic_facet | Engineering Circuits and Systems Electrical Engineering Signal, Image and Speech Processing Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Digitale Signalverarbeitung Silicon-Compiler |
url | https://doi.org/10.1007/978-1-4757-2222-2 |
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