Logic Synthesis for Low Power VLSI Designs:
Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synth...
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| Main Authors: | , |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Boston, MA
Springer US
1998
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| Subjects: | |
| Online Access: | BTU01 Volltext |
| Summary: | Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints. Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis |
| Physical Description: | 1 Online-Ressource (XV, 236 p) |
| ISBN: | 9781461554530 |
| DOI: | 10.1007/978-1-4615-5453-0 |
Staff View
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| id | DE-604.BV045187257 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:59Z |
| institution | BVB |
| isbn | 9781461554530 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030576435 |
| oclc_num | 1053842787 |
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| owner | DE-634 |
| owner_facet | DE-634 |
| physical | 1 Online-Ressource (XV, 236 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 1998 |
| publishDateSearch | 1998 |
| publishDateSort | 1998 |
| publisher | Springer US |
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| spelling | Iman, Sasan Verfasser aut Logic Synthesis for Low Power VLSI Designs by Sasan Iman, Massoud Pedram Boston, MA Springer US 1998 1 Online-Ressource (XV, 236 p) txt rdacontent c rdamedia cr rdacarrier Logic Synthesis for Low Power VLSI Designs presents a systematic and comprehensive treatment of power modeling and optimization at the logic level. More precisely, this book provides a detailed presentation of methodologies, algorithms and CAD tools for power modeling, estimation and analysis, synthesis and optimization at the logic level. Logic Synthesis for Low Power VLSI Designs contains detailed descriptions of technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques for low power. It also emphasizes the trade-off techniques for two-level and multi-level logic circuits that involve power dissipation and circuit speed, in the hope that the readers can better understand the issues and ways of achieving their power dissipation goal while meeting the timing constraints. Logic Synthesis for Low Power VLSI Designs is written for VLSI design engineers, CAD professionals, and students who have had a basic knowledge of CMOS digital design and logic synthesis Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Pedram, Massoud aut Erscheint auch als Druck-Ausgabe 9781461374909 https://doi.org/10.1007/978-1-4615-5453-0 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Iman, Sasan Pedram, Massoud Logic Synthesis for Low Power VLSI Designs Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| title | Logic Synthesis for Low Power VLSI Designs |
| title_auth | Logic Synthesis for Low Power VLSI Designs |
| title_exact_search | Logic Synthesis for Low Power VLSI Designs |
| title_full | Logic Synthesis for Low Power VLSI Designs by Sasan Iman, Massoud Pedram |
| title_fullStr | Logic Synthesis for Low Power VLSI Designs by Sasan Iman, Massoud Pedram |
| title_full_unstemmed | Logic Synthesis for Low Power VLSI Designs by Sasan Iman, Massoud Pedram |
| title_short | Logic Synthesis for Low Power VLSI Designs |
| title_sort | logic synthesis for low power vlsi designs |
| topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| url | https://doi.org/10.1007/978-1-4615-5453-0 |
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