Latchup in CMOS Technology: The Problem and Its Cure
Why a book on Iatchup? Latchup has been, and continues to be, a potentially serious CMOS reliability concern. This concern is becoming more widespread with the ascendency of CMOS as the dominant VLSI technology, particularly as parasitic bipolar characteristics continue to improve at ever smaller di...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1986
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Schriftenreihe: | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
13 |
Schlagworte: | |
Online-Zugang: | BTU01 Volltext |
Zusammenfassung: | Why a book on Iatchup? Latchup has been, and continues to be, a potentially serious CMOS reliability concern. This concern is becoming more widespread with the ascendency of CMOS as the dominant VLSI technology, particularly as parasitic bipolar characteristics continue to improve at ever smaller dimensions on silicon wafers with ever lower defect densities. Although many successful parts have been marketed, latchup solutions have often been ad hoc. Although latchup avoidance techniques have been previously itemized, there has been little quantitative evaluation of prior latchup fixes. What is needed is a more general, more systematic treatment of the latchup problem. Because of the wide variety of CMOS technologies and the long term interest in latchup, some overall guiding principles are needed. Appreciating the variety of possible triggering mechanisms is key to a real understanding of latchup. This work reviews the origin of each and its effect on the parasitic structure. Each triggering mechanism is classified according to a new taxonomy |
Beschreibung: | 1 Online-Ressource (XXII, 244 p) |
ISBN: | 9781475718874 |
DOI: | 10.1007/978-1-4757-1887-4 |
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author | Troutman, Ronald R. |
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discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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institution | BVB |
isbn | 9781475718874 |
language | English |
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spelling | Troutman, Ronald R. Verfasser aut Latchup in CMOS Technology The Problem and Its Cure by Ronald R. Troutman Boston, MA Springer US 1986 1 Online-Ressource (XXII, 244 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 13 Why a book on Iatchup? Latchup has been, and continues to be, a potentially serious CMOS reliability concern. This concern is becoming more widespread with the ascendency of CMOS as the dominant VLSI technology, particularly as parasitic bipolar characteristics continue to improve at ever smaller dimensions on silicon wafers with ever lower defect densities. Although many successful parts have been marketed, latchup solutions have often been ad hoc. Although latchup avoidance techniques have been previously itemized, there has been little quantitative evaluation of prior latchup fixes. What is needed is a more general, more systematic treatment of the latchup problem. Because of the wide variety of CMOS technologies and the long term interest in latchup, some overall guiding principles are needed. Appreciating the variety of possible triggering mechanisms is key to a real understanding of latchup. This work reviews the origin of each and its effect on the parasitic structure. Each triggering mechanism is classified according to a new taxonomy Engineering Electrical Engineering Electrical engineering Latch-up-Effekt (DE-588)4254228-5 gnd rswk-swf CMOS (DE-588)4010319-5 gnd rswk-swf CMOS-Schaltung (DE-588)4148111-2 gnd rswk-swf CMOS (DE-588)4010319-5 s Latch-up-Effekt (DE-588)4254228-5 s 1\p DE-604 CMOS-Schaltung (DE-588)4148111-2 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9781441951991 https://doi.org/10.1007/978-1-4757-1887-4 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Troutman, Ronald R. Latchup in CMOS Technology The Problem and Its Cure Engineering Electrical Engineering Electrical engineering Latch-up-Effekt (DE-588)4254228-5 gnd CMOS (DE-588)4010319-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd |
subject_GND | (DE-588)4254228-5 (DE-588)4010319-5 (DE-588)4148111-2 |
title | Latchup in CMOS Technology The Problem and Its Cure |
title_auth | Latchup in CMOS Technology The Problem and Its Cure |
title_exact_search | Latchup in CMOS Technology The Problem and Its Cure |
title_full | Latchup in CMOS Technology The Problem and Its Cure by Ronald R. Troutman |
title_fullStr | Latchup in CMOS Technology The Problem and Its Cure by Ronald R. Troutman |
title_full_unstemmed | Latchup in CMOS Technology The Problem and Its Cure by Ronald R. Troutman |
title_short | Latchup in CMOS Technology |
title_sort | latchup in cmos technology the problem and its cure |
title_sub | The Problem and Its Cure |
topic | Engineering Electrical Engineering Electrical engineering Latch-up-Effekt (DE-588)4254228-5 gnd CMOS (DE-588)4010319-5 gnd CMOS-Schaltung (DE-588)4148111-2 gnd |
topic_facet | Engineering Electrical Engineering Electrical engineering Latch-up-Effekt CMOS CMOS-Schaltung |
url | https://doi.org/10.1007/978-1-4757-1887-4 |
work_keys_str_mv | AT troutmanronaldr latchupincmostechnologytheproblemanditscure |