Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	Lam, William K. C. (VerfasserIn), Brayton, Robert K. (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Boston, MA Springer US 1994
Schriftenreihe:	The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 270
Schlagworte:	Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits VLSI Zeitverhalten Boolesche Funktion
Online-Zugang:	BTU01 Volltext
Zusammenfassung:	Timing research in high performance VLSI systems has advanced at a steady pace over the last few years, while tools, especially theoretical mechanisms, lag behind. Much present timing research relies heavily on timing diagrams, which, although intuitive, are inadequate for analysis of large designs with many parameters. Further, timing diagrams offer only approximations, not exact solutions, to many timing problems and provide little insight in the cases where temporal properties of a design interact intricately with the design's logical functionalities. This book presents a methodology for timing research which facilitates analy­ sis and design of circuits and systems in a unified temporal and logical domain. In the first part, we introduce an algebraic representation formalism, Timed Boolean Functions (TBF's), which integrates both logical and timing informa­ tion of digital circuits and systems into a single formalism. We also give a canonical form, TBF BDD's, for them, which can be used for efficient ma­ nipulation. In the second part, we apply Timed Boolean Functions to three problems in timing research, for which exact solutions are obtained for the first time: 1. computing the exact delays of combinational circuits and the minimum cycle times of finite state machines, 2. analysis and synthesis of wavepipelining circuits, a high speed architecture for which precise timing relations between signals are essential for correct operations, 3. verification of circuit and system performance and coverage of delay faults by testing
Beschreibung:	1 Online-Ressource (XXI, 273 p)
ISBN:	9781461526889
DOI:	10.1007/978-1-4615-2688-9