A Systolic Array Parallelizing Compiler:
Widespread use of parallel processing will become a reality only if the process of porting applications to parallel computers can be largely automated. Usually it is straightforward for a user to determine how an application can be mapped onto a parallel machine; however, the actual development of p...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1990
|
| Schriftenreihe: | The Kluwer International Series in Engineering and Computer Science, High Performance Computing Systems, Networks and Algorithms
106 |
| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | Widespread use of parallel processing will become a reality only if the process of porting applications to parallel computers can be largely automated. Usually it is straightforward for a user to determine how an application can be mapped onto a parallel machine; however, the actual development of parallel code, if done by hand, is typically difficult and time consuming. Parallelizing compilers, which can gen erate parallel code automatically, are therefore a key technology for parallel processing. In this book, Ping-Sheng Tseng describes a parallelizing compiler for systolic arrays, called AL. Although parallelizing compilers are quite common for shared-memory parallel machines, the AL compiler is one of the first working parallelizing compilers for distributed memory machines, of which systolic arrays are a special case. The AL compiler takes advantage of the fine grain and high bandwidth interprocessor communication capabilities in a systolic architecture to generate efficient parallel code. xii Foreword While capable of handling an important class of applications, AL is not intended to be a general-purpose parallelizing compiler |
| Beschreibung: | 1 Online-Ressource (XVIII, 130 p) |
| ISBN: | 9781461315599 |
| DOI: | 10.1007/978-1-4613-1559-9 |
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Datensatz im Suchindex
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| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| doi_str_mv | 10.1007/978-1-4613-1559-9 |
| format | Electronic eBook |
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| spelling | Tseng, Ping-Sheng Verfasser aut A Systolic Array Parallelizing Compiler by Ping-Sheng Tseng Boston, MA Springer US 1990 1 Online-Ressource (XVIII, 130 p) txt rdacontent c rdamedia cr rdacarrier The Kluwer International Series in Engineering and Computer Science, High Performance Computing Systems, Networks and Algorithms 106 Widespread use of parallel processing will become a reality only if the process of porting applications to parallel computers can be largely automated. Usually it is straightforward for a user to determine how an application can be mapped onto a parallel machine; however, the actual development of parallel code, if done by hand, is typically difficult and time consuming. Parallelizing compilers, which can gen erate parallel code automatically, are therefore a key technology for parallel processing. In this book, Ping-Sheng Tseng describes a parallelizing compiler for systolic arrays, called AL. Although parallelizing compilers are quite common for shared-memory parallel machines, the AL compiler is one of the first working parallelizing compilers for distributed memory machines, of which systolic arrays are a special case. The AL compiler takes advantage of the fine grain and high bandwidth interprocessor communication capabilities in a systolic architecture to generate efficient parallel code. xii Foreword While capable of handling an important class of applications, AL is not intended to be a general-purpose parallelizing compiler Computer Science Processor Architectures Signal, Image and Speech Processing Computer science Microprocessors Systolisches Array (DE-588)4212939-4 gnd rswk-swf Parallelverarbeitung (DE-588)4075860-6 gnd rswk-swf 1\p (DE-588)4113937-9 Hochschulschrift gnd-content Parallelverarbeitung (DE-588)4075860-6 s Systolisches Array (DE-588)4212939-4 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9781461288350 https://doi.org/10.1007/978-1-4613-1559-9 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Tseng, Ping-Sheng A Systolic Array Parallelizing Compiler Computer Science Processor Architectures Signal, Image and Speech Processing Computer science Microprocessors Systolisches Array (DE-588)4212939-4 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| subject_GND | (DE-588)4212939-4 (DE-588)4075860-6 (DE-588)4113937-9 |
| title | A Systolic Array Parallelizing Compiler |
| title_auth | A Systolic Array Parallelizing Compiler |
| title_exact_search | A Systolic Array Parallelizing Compiler |
| title_full | A Systolic Array Parallelizing Compiler by Ping-Sheng Tseng |
| title_fullStr | A Systolic Array Parallelizing Compiler by Ping-Sheng Tseng |
| title_full_unstemmed | A Systolic Array Parallelizing Compiler by Ping-Sheng Tseng |
| title_short | A Systolic Array Parallelizing Compiler |
| title_sort | a systolic array parallelizing compiler |
| topic | Computer Science Processor Architectures Signal, Image and Speech Processing Computer science Microprocessors Systolisches Array (DE-588)4212939-4 gnd Parallelverarbeitung (DE-588)4075860-6 gnd |
| topic_facet | Computer Science Processor Architectures Signal, Image and Speech Processing Computer science Microprocessors Systolisches Array Parallelverarbeitung Hochschulschrift |
| url | https://doi.org/10.1007/978-1-4613-1559-9 |
| work_keys_str_mv | AT tsengpingsheng asystolicarrayparallelizingcompiler |