Co-Synthesis of Hardware and Software for Digital Embedded Systems:
Co-Synthesis of Hardware and Software for Digital Embedded Systems, with a Foreword written by Giovanni De Micheli, presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-cons...
Gespeichert in:
1. Verfasser: | |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1995
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Schriftenreihe: | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
329 |
Schlagworte: | |
Online-Zugang: | BTU01 Volltext |
Zusammenfassung: | Co-Synthesis of Hardware and Software for Digital Embedded Systems, with a Foreword written by Giovanni De Micheli, presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-constrained embedded systems. Recent advances in chip-level synthesis have made it possible to synthesize application-specific circuits under strict timing constraints. This work advances the state of the art by formulating the problem of system synthesis using both application-specific as well as reprogrammable components, such as off-the-shelf processors. Timing constraints are used to determine what part of the system functionality must be delegated to dedicated application-specific hardware while the rest is delegated to software that runs on the processor. This co-synthesis of hardware and software from behavioral specifications makes it possible to realize real-time embedded systems using off-the-shelf parts and a relatively small amount of application-specific circuitry that can be mapped to semi-custom VLSI such as gate arrays. The ability to perform detailed analysis of timing performance provides the opportunity of improving the system definition by creating better phototypes. Co-Synthesis of Hardware and Software for Digital Embedded Systems is of interest to CAD researchers and developers who want to branch off into the expanding field of hardware/software co-design, as well as to digital system designers who are interested in the present power and limitations of CAD techniques and their likely evolution |
Beschreibung: | 1 Online-Ressource (XVII, 266 p) |
ISBN: | 9781461522874 |
DOI: | 10.1007/978-1-4615-2287-4 |
Internformat
MARC
LEADER | 00000nmm a2200000zcb4500 | ||
---|---|---|---|
001 | BV045186274 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 180912s1995 |||| o||u| ||||||eng d | ||
020 | |a 9781461522874 |9 978-1-4615-2287-4 | ||
024 | 7 | |a 10.1007/978-1-4615-2287-4 |2 doi | |
035 | |a (ZDB-2-ENG)978-1-4615-2287-4 | ||
035 | |a (OCoLC)1053800563 | ||
035 | |a (DE-599)BVBBV045186274 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-634 | ||
082 | 0 | |a 621.3815 |2 23 | |
100 | 1 | |a Gupta, Rajesh Kumar |e Verfasser |4 aut | |
245 | 1 | 0 | |a Co-Synthesis of Hardware and Software for Digital Embedded Systems |c by Rajesh Kumar Gupta |
264 | 1 | |a Boston, MA |b Springer US |c 1995 | |
300 | |a 1 Online-Ressource (XVII, 266 p) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |v 329 | |
520 | |a Co-Synthesis of Hardware and Software for Digital Embedded Systems, with a Foreword written by Giovanni De Micheli, presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-constrained embedded systems. Recent advances in chip-level synthesis have made it possible to synthesize application-specific circuits under strict timing constraints. This work advances the state of the art by formulating the problem of system synthesis using both application-specific as well as reprogrammable components, such as off-the-shelf processors. Timing constraints are used to determine what part of the system functionality must be delegated to dedicated application-specific hardware while the rest is delegated to software that runs on the processor. This co-synthesis of hardware and software from behavioral specifications makes it possible to realize real-time embedded systems using off-the-shelf parts and a relatively small amount of application-specific circuitry that can be mapped to semi-custom VLSI such as gate arrays. The ability to perform detailed analysis of timing performance provides the opportunity of improving the system definition by creating better phototypes. Co-Synthesis of Hardware and Software for Digital Embedded Systems is of interest to CAD researchers and developers who want to branch off into the expanding field of hardware/software co-design, as well as to digital system designers who are interested in the present power and limitations of CAD techniques and their likely evolution | ||
650 | 4 | |a Engineering | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Electrical Engineering | |
650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
650 | 4 | |a Engineering | |
650 | 4 | |a Computer-aided engineering | |
650 | 4 | |a Electrical engineering | |
650 | 4 | |a Electronic circuits | |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Software |0 (DE-588)4055382-6 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a CAD |0 (DE-588)4069794-0 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Hardware |0 (DE-588)4023422-8 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Hardware |0 (DE-588)4023422-8 |D s |
689 | 0 | 1 | |a Software |0 (DE-588)4055382-6 |D s |
689 | 0 | 2 | |a VLSI |0 (DE-588)4117388-0 |D s |
689 | 0 | 3 | |a CAD |0 (DE-588)4069794-0 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
689 | 1 | 0 | |a Hardware |0 (DE-588)4023422-8 |D s |
689 | 1 | 1 | |a Software |0 (DE-588)4055382-6 |D s |
689 | 1 | 2 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 1 | |8 2\p |5 DE-604 | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781461359654 |
856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4615-2287-4 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
912 | |a ZDB-2-ENG | ||
940 | 1 | |q ZDB-2-ENG_Archiv | |
999 | |a oai:aleph.bib-bvb.de:BVB01-030575451 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
883 | 1 | |8 2\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
966 | e | |u https://doi.org/10.1007/978-1-4615-2287-4 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext |
Datensatz im Suchindex
_version_ | 1804178877076996096 |
---|---|
any_adam_object | |
author | Gupta, Rajesh Kumar |
author_facet | Gupta, Rajesh Kumar |
author_role | aut |
author_sort | Gupta, Rajesh Kumar |
author_variant | r k g rk rkg |
building | Verbundindex |
bvnumber | BV045186274 |
collection | ZDB-2-ENG |
ctrlnum | (ZDB-2-ENG)978-1-4615-2287-4 (OCoLC)1053800563 (DE-599)BVBBV045186274 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4615-2287-4 |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>04185nmm a2200661zcb4500</leader><controlfield tag="001">BV045186274</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180912s1995 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781461522874</subfield><subfield code="9">978-1-4615-2287-4</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4615-2287-4</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4615-2287-4</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1053800563</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045186274</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Gupta, Rajesh Kumar</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Co-Synthesis of Hardware and Software for Digital Embedded Systems</subfield><subfield code="c">by Rajesh Kumar Gupta</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">1995</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XVII, 266 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing</subfield><subfield code="v">329</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Co-Synthesis of Hardware and Software for Digital Embedded Systems, with a Foreword written by Giovanni De Micheli, presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-constrained embedded systems. Recent advances in chip-level synthesis have made it possible to synthesize application-specific circuits under strict timing constraints. This work advances the state of the art by formulating the problem of system synthesis using both application-specific as well as reprogrammable components, such as off-the-shelf processors. Timing constraints are used to determine what part of the system functionality must be delegated to dedicated application-specific hardware while the rest is delegated to software that runs on the processor. This co-synthesis of hardware and software from behavioral specifications makes it possible to realize real-time embedded systems using off-the-shelf parts and a relatively small amount of application-specific circuitry that can be mapped to semi-custom VLSI such as gate arrays. The ability to perform detailed analysis of timing performance provides the opportunity of improving the system definition by creating better phototypes. Co-Synthesis of Hardware and Software for Digital Embedded Systems is of interest to CAD researchers and developers who want to branch off into the expanding field of hardware/software co-design, as well as to digital system designers who are interested in the present power and limitations of CAD techniques and their likely evolution</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Software</subfield><subfield code="0">(DE-588)4055382-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Hardware</subfield><subfield code="0">(DE-588)4023422-8</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Hardware</subfield><subfield code="0">(DE-588)4023422-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Software</subfield><subfield code="0">(DE-588)4055382-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="2"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="3"><subfield code="a">CAD</subfield><subfield code="0">(DE-588)4069794-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Hardware</subfield><subfield code="0">(DE-588)4023422-8</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">Software</subfield><subfield code="0">(DE-588)4055382-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="2"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781461359654</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4615-2287-4</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_Archiv</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030575451</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">2\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4615-2287-4</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV045186274 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:57Z |
institution | BVB |
isbn | 9781461522874 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030575451 |
oclc_num | 1053800563 |
open_access_boolean | |
owner | DE-634 |
owner_facet | DE-634 |
physical | 1 Online-Ressource (XVII, 266 p) |
psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
publishDate | 1995 |
publishDateSearch | 1995 |
publishDateSort | 1995 |
publisher | Springer US |
record_format | marc |
series2 | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
spelling | Gupta, Rajesh Kumar Verfasser aut Co-Synthesis of Hardware and Software for Digital Embedded Systems by Rajesh Kumar Gupta Boston, MA Springer US 1995 1 Online-Ressource (XVII, 266 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 329 Co-Synthesis of Hardware and Software for Digital Embedded Systems, with a Foreword written by Giovanni De Micheli, presents techniques that are useful in building complex embedded systems. These techniques provide a competitive advantage over purely hardware or software implementations of time-constrained embedded systems. Recent advances in chip-level synthesis have made it possible to synthesize application-specific circuits under strict timing constraints. This work advances the state of the art by formulating the problem of system synthesis using both application-specific as well as reprogrammable components, such as off-the-shelf processors. Timing constraints are used to determine what part of the system functionality must be delegated to dedicated application-specific hardware while the rest is delegated to software that runs on the processor. This co-synthesis of hardware and software from behavioral specifications makes it possible to realize real-time embedded systems using off-the-shelf parts and a relatively small amount of application-specific circuitry that can be mapped to semi-custom VLSI such as gate arrays. The ability to perform detailed analysis of timing performance provides the opportunity of improving the system definition by creating better phototypes. Co-Synthesis of Hardware and Software for Digital Embedded Systems is of interest to CAD researchers and developers who want to branch off into the expanding field of hardware/software co-design, as well as to digital system designers who are interested in the present power and limitations of CAD techniques and their likely evolution Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Entwurf (DE-588)4121208-3 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Software (DE-588)4055382-6 gnd rswk-swf CAD (DE-588)4069794-0 gnd rswk-swf Hardware (DE-588)4023422-8 gnd rswk-swf Hardware (DE-588)4023422-8 s Software (DE-588)4055382-6 s VLSI (DE-588)4117388-0 s CAD (DE-588)4069794-0 s 1\p DE-604 Entwurf (DE-588)4121208-3 s 2\p DE-604 Erscheint auch als Druck-Ausgabe 9781461359654 https://doi.org/10.1007/978-1-4615-2287-4 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Gupta, Rajesh Kumar Co-Synthesis of Hardware and Software for Digital Embedded Systems Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd Software (DE-588)4055382-6 gnd CAD (DE-588)4069794-0 gnd Hardware (DE-588)4023422-8 gnd |
subject_GND | (DE-588)4121208-3 (DE-588)4117388-0 (DE-588)4055382-6 (DE-588)4069794-0 (DE-588)4023422-8 |
title | Co-Synthesis of Hardware and Software for Digital Embedded Systems |
title_auth | Co-Synthesis of Hardware and Software for Digital Embedded Systems |
title_exact_search | Co-Synthesis of Hardware and Software for Digital Embedded Systems |
title_full | Co-Synthesis of Hardware and Software for Digital Embedded Systems by Rajesh Kumar Gupta |
title_fullStr | Co-Synthesis of Hardware and Software for Digital Embedded Systems by Rajesh Kumar Gupta |
title_full_unstemmed | Co-Synthesis of Hardware and Software for Digital Embedded Systems by Rajesh Kumar Gupta |
title_short | Co-Synthesis of Hardware and Software for Digital Embedded Systems |
title_sort | co synthesis of hardware and software for digital embedded systems |
topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Entwurf (DE-588)4121208-3 gnd VLSI (DE-588)4117388-0 gnd Software (DE-588)4055382-6 gnd CAD (DE-588)4069794-0 gnd Hardware (DE-588)4023422-8 gnd |
topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Entwurf VLSI Software CAD Hardware |
url | https://doi.org/10.1007/978-1-4615-2287-4 |
work_keys_str_mv | AT guptarajeshkumar cosynthesisofhardwareandsoftwarefordigitalembeddedsystems |