Hardware Annealing in Analog VLSI Neurocomputing:
Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be...
Gespeichert in:
Hauptverfasser: | , |
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Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Boston, MA
Springer US
1991
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Schriftenreihe: | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing
127 |
Schlagworte: | |
Online-Zugang: | BTU01 URL des Erstveröffentlichers |
Zusammenfassung: | Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips |
Beschreibung: | 1 Online-Ressource (XXI, 234 p) |
ISBN: | 9781461539841 |
DOI: | 10.1007/978-1-4615-3984-1 |
Internformat
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520 | |a Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips | ||
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Datensatz im Suchindex
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author | Lee, Bang W. Sheu, Bing J. |
author_facet | Lee, Bang W. Sheu, Bing J. |
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collection | ZDB-2-ENG |
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dewey-full | 621.3 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
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dewey-sort | 3621.3 |
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discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-1-4615-3984-1 |
format | Electronic eBook |
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id | DE-604.BV045185422 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T08:10:55Z |
institution | BVB |
isbn | 9781461539841 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030574600 |
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physical | 1 Online-Ressource (XXI, 234 p) |
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publishDate | 1991 |
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publisher | Springer US |
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series2 | The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing |
spelling | Lee, Bang W. Verfasser aut Hardware Annealing in Analog VLSI Neurocomputing by Bang W. Lee, Bing J. Sheu Boston, MA Springer US 1991 1 Online-Ressource (XXI, 234 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science, VLSI, Computer Architecture and Digital Signal Processing 127 Rapid advances in neural sciences and VLSI design technologies have provided an excellent means to boost the computational capability and efficiency of data and signal processing tasks by several orders of magnitude. With massively parallel processing capabilities, artificial neural networks can be used to solve many engineering and scientific problems. Due to the optimized data communication structure for artificial intelligence applications, a neurocomputer is considered as the most promising sixth-generation computing machine. Typical applica tions of artificial neural networks include associative memory, pattern classification, early vision processing, speech recognition, image data compression, and intelligent robot control. VLSI neural circuits play an important role in exploring and exploiting the rich properties of artificial neural networks by using pro grammable synapses and gain-adjustable neurons. Basic building blocks of the analog VLSI neural networks consist of operational amplifiers as electronic neurons and synthesized resistors as electronic synapses. The synapse weight information can be stored in the dynamically refreshed capacitors for medium-term storage or in the floating-gate of an EEPROM cell for long-term storage. The feedback path in the amplifier can continuously change the output neuron operation from the unity-gain configuration to a high-gain configuration. The adjustability of the vol tage gain in the output neurons allows the implementation of hardware annealing in analog VLSI neural chips to find optimal solutions very efficiently. Both supervised learning and unsupervised learning can be implemented by using the programmable neural chips Engineering Electrical Engineering Electrical engineering VLSI (DE-588)4117388-0 gnd rswk-swf Neuronales Netz (DE-588)4226127-2 gnd rswk-swf Simulation (DE-588)4055072-2 gnd rswk-swf Analoge integrierte Schaltung (DE-588)4112519-8 gnd rswk-swf Analoge integrierte Schaltung (DE-588)4112519-8 s VLSI (DE-588)4117388-0 s Neuronales Netz (DE-588)4226127-2 s Simulation (DE-588)4055072-2 s 1\p DE-604 Sheu, Bing J. aut Erscheint auch als Druck-Ausgabe 9781461367802 https://doi.org/10.1007/978-1-4615-3984-1 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Lee, Bang W. Sheu, Bing J. Hardware Annealing in Analog VLSI Neurocomputing Engineering Electrical Engineering Electrical engineering VLSI (DE-588)4117388-0 gnd Neuronales Netz (DE-588)4226127-2 gnd Simulation (DE-588)4055072-2 gnd Analoge integrierte Schaltung (DE-588)4112519-8 gnd |
subject_GND | (DE-588)4117388-0 (DE-588)4226127-2 (DE-588)4055072-2 (DE-588)4112519-8 |
title | Hardware Annealing in Analog VLSI Neurocomputing |
title_auth | Hardware Annealing in Analog VLSI Neurocomputing |
title_exact_search | Hardware Annealing in Analog VLSI Neurocomputing |
title_full | Hardware Annealing in Analog VLSI Neurocomputing by Bang W. Lee, Bing J. Sheu |
title_fullStr | Hardware Annealing in Analog VLSI Neurocomputing by Bang W. Lee, Bing J. Sheu |
title_full_unstemmed | Hardware Annealing in Analog VLSI Neurocomputing by Bang W. Lee, Bing J. Sheu |
title_short | Hardware Annealing in Analog VLSI Neurocomputing |
title_sort | hardware annealing in analog vlsi neurocomputing |
topic | Engineering Electrical Engineering Electrical engineering VLSI (DE-588)4117388-0 gnd Neuronales Netz (DE-588)4226127-2 gnd Simulation (DE-588)4055072-2 gnd Analoge integrierte Schaltung (DE-588)4112519-8 gnd |
topic_facet | Engineering Electrical Engineering Electrical engineering VLSI Neuronales Netz Simulation Analoge integrierte Schaltung |
url | https://doi.org/10.1007/978-1-4615-3984-1 |
work_keys_str_mv | AT leebangw hardwareannealinginanalogvlsineurocomputing AT sheubingj hardwareannealinginanalogvlsineurocomputing |