Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs:
In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires,...
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| Hauptverfasser: | , , |
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1996
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| Schlagworte: | |
| Online-Zugang: | BTU01 Volltext |
| Zusammenfassung: | In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks |
| Beschreibung: | 1 Online-Ressource (XXII, 208 p) |
| ISBN: | 9781461313991 |
| DOI: | 10.1007/978-1-4613-1399-1 |
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| 520 | |a In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks | ||
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Datensatz im Suchindex
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| author | Stanisic, Balsha R. Rutenbar, Rob A. Carley, L. Richard |
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| dewey-full | 621.3815 |
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| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
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| id | DE-604.BV045185167 |
| illustrated | Not Illustrated |
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| institution | BVB |
| isbn | 9781461313991 |
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| spelling | Stanisic, Balsha R. Verfasser aut Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs by Balsha R. Stanisic, Rob A. Rutenbar, L. Richard Carley Boston, MA Springer US 1996 1 Online-Ressource (XXII, 208 p) txt rdacontent c rdamedia cr rdacarrier In the early days of VLSI, the design of the power distribution for an integrated cir cuit was rather simple. Power distribution --the design of the geometric topology for the network of wires that connect the various power supplies, the widths of the indi vidual segments for each of these wires, the number and location of the power I/O pins around the periphery of the chip --was simple because the chips were simpler. Few available wiring layers forced floorplans that allowed simple, planar (non-over lapping) power networks. Lower speeds and circuit density made the choice of the wire widths easier: we made them just fat enough to avoid resistive voltage drops due to switching currents in the supply network. And we just didn't need enormous num bers of power and ground pins on the package for the chips to work. It's not so simple any more. Increased integration has forced us to focus on reliability concerns such as metal elec tromigration, which affects wire sizing decisions in the power network. Extra metal layers have allowed more flexibility in the topological layout of the power networks Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Hybridschaltung (DE-588)4026281-9 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 s Hybridschaltung (DE-588)4026281-9 s Schaltungsentwurf (DE-588)4179389-4 s 1\p DE-604 Rutenbar, Rob A. aut Carley, L. Richard aut Erscheint auch als Druck-Ausgabe 9781461286066 https://doi.org/10.1007/978-1-4613-1399-1 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Stanisic, Balsha R. Rutenbar, Rob A. Carley, L. Richard Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Hybridschaltung (DE-588)4026281-9 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| subject_GND | (DE-588)4026281-9 (DE-588)4122250-7 (DE-588)4179389-4 |
| title | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs |
| title_auth | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs |
| title_exact_search | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs |
| title_full | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs by Balsha R. Stanisic, Rob A. Rutenbar, L. Richard Carley |
| title_fullStr | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs by Balsha R. Stanisic, Rob A. Rutenbar, L. Richard Carley |
| title_full_unstemmed | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs by Balsha R. Stanisic, Rob A. Rutenbar, L. Richard Carley |
| title_short | Synthesis of Power Distribution to Manage Signal Integrity in Mixed-Signal ICs |
| title_sort | synthesis of power distribution to manage signal integrity in mixed signal ics |
| topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Hybridschaltung (DE-588)4026281-9 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd Schaltungsentwurf (DE-588)4179389-4 gnd |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Hybridschaltung Kundenspezifische Schaltung Schaltungsentwurf |
| url | https://doi.org/10.1007/978-1-4613-1399-1 |
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