Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout:
"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and t...
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| Main Authors: | , , |
|---|---|
| Format: | Electronic eBook |
| Language: | English |
| Published: |
Boston, MA
Springer US
2004
|
| Subjects: | |
| Online Access: | FHI01 BTU01 Volltext |
| Summary: | "As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks." - Stuart Swan |
| Physical Description: | 1 Online-Ressource (XVIII, 376 p) |
| ISBN: | 9781402080296 |
| DOI: | 10.1007/b105272 |
Staff View
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV045148666 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180827s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 9781402080296 |9 978-1-4020-8029-6 | ||
| 024 | 7 | |a 10.1007/b105272 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-1-4020-8029-6 | ||
| 035 | |a (OCoLC)1050936189 | ||
| 035 | |a (DE-599)BVBBV045148666 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 100 | 1 | |a Singh, Leena |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout |c by Leena Singh, Leonard Drucker, Neyaz Khan |
| 264 | 1 | |a Boston, MA |b Springer US |c 2004 | |
| 300 | |a 1 Online-Ressource (XVIII, 376 p) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 520 | |a "As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks." - Stuart Swan | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Computer-Aided Engineering (CAD, CAE) and Design | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Computer-aided engineering | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 700 | 1 | |a Drucker, Leonard |4 aut | |
| 700 | 1 | |a Khan, Neyaz |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781402076725 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/b105272 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030538365 | ||
| 966 | e | |u https://doi.org/10.1007/b105272 |l FHI01 |p ZDB-2-ENG |q ZDB-2-ENG_2000/2004 |x Verlag |3 Volltext | |
| 966 | e | |u https://doi.org/10.1007/b105272 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Record in the Search Index
| _version_ | 1804178819022585856 |
|---|---|
| any_adam_object | |
| author | Singh, Leena Drucker, Leonard Khan, Neyaz |
| author_facet | Singh, Leena Drucker, Leonard Khan, Neyaz |
| author_role | aut aut aut |
| author_sort | Singh, Leena |
| author_variant | l s ls l d ld n k nk |
| building | Verbundindex |
| bvnumber | BV045148666 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-1-4020-8029-6 (OCoLC)1050936189 (DE-599)BVBBV045148666 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/b105272 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03005nmm a2200493zc 4500</leader><controlfield tag="001">BV045148666</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180827s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402080296</subfield><subfield code="9">978-1-4020-8029-6</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/b105272</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4020-8029-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1050936189</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045148666</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Singh, Leena</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout</subfield><subfield code="c">by Leena Singh, Leonard Drucker, Neyaz Khan</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XVIII, 376 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">"As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks." - Stuart Swan</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-Aided Engineering (CAD, CAE) and Design</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer-aided engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Drucker, Leonard</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Khan, Neyaz</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781402076725</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/b105272</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030538365</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b105272</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b105272</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045148666 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:01Z |
| institution | BVB |
| isbn | 9781402080296 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538365 |
| oclc_num | 1050936189 |
| open_access_boolean | |
| owner | DE-573 DE-634 |
| owner_facet | DE-573 DE-634 |
| physical | 1 Online-Ressource (XVIII, 376 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Springer US |
| record_format | marc |
| spelling | Singh, Leena Verfasser aut Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout by Leena Singh, Leonard Drucker, Neyaz Khan Boston, MA Springer US 2004 1 Online-Ressource (XVIII, 376 p) txt rdacontent c rdamedia cr rdacarrier "As chip size and complexity continues to grow exponentially, the challenges of functional verification are becoming a critical issue in the electronics industry. It is now commonly heard that logical errors missed during functional verification are the most common cause of chip re-spins, and that the costs associated with functional verification are now outweighing the costs of chip design. To cope with these challenges engineers are increasingly relying on new design and verification methodologies and languages. Transaction-based design and verification, constrained random stimulus generation, functional coverage analysis, and assertion-based verification are all techniques that advanced design and verification teams routinely use today. Engineers are also increasingly turning to design and verification models based on C/C++ and SystemC in order to build more abstract, higher performance hardware and software models and to escape the limitations of RTL HDLs. This new book, Advanced Verification Techniques, provides specific guidance for these advanced verification techniques. The book includes realistic examples and shows how SystemC and SCV can be applied to a variety of advanced design and verification tasks." - Stuart Swan Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits Drucker, Leonard aut Khan, Neyaz aut Erscheint auch als Druck-Ausgabe 9781402076725 https://doi.org/10.1007/b105272 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Singh, Leena Drucker, Leonard Khan, Neyaz Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| title | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout |
| title_auth | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout |
| title_exact_search | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout |
| title_full | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout by Leena Singh, Leonard Drucker, Neyaz Khan |
| title_fullStr | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout by Leena Singh, Leonard Drucker, Neyaz Khan |
| title_full_unstemmed | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout by Leena Singh, Leonard Drucker, Neyaz Khan |
| title_short | Advanced Verification Techniques: A SystemC Based Approach for Successful Tapeout |
| title_sort | advanced verification techniques a systemc based approach for successful tapeout |
| topic | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Computer-Aided Engineering (CAD, CAE) and Design Computer-aided engineering Electrical engineering Electronic circuits |
| url | https://doi.org/10.1007/b105272 |
| work_keys_str_mv | AT singhleena advancedverificationtechniquesasystemcbasedapproachforsuccessfultapeout AT druckerleonard advancedverificationtechniquesasystemcbasedapproachforsuccessfultapeout AT khanneyaz advancedverificationtechniquesasystemcbasedapproachforsuccessfultapeout |