SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits:
Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits pres...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
2004
|
| Schlagworte: | |
| Online-Zugang: | FHI01 BTU01 Volltext |
| Zusammenfassung: | Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers |
| Beschreibung: | 1 Online-Ressource (XXIII, 233 p) |
| ISBN: | 9781402078385 |
| DOI: | 10.1007/b117058 |
Internformat
MARC
| LEADER | 00000nmm a2200000zc 4500 | ||
|---|---|---|---|
| 001 | BV045148652 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180827s2004 |||| o||u| ||||||eng d | ||
| 020 | |a 9781402078385 |9 978-1-4020-7838-5 | ||
| 024 | 7 | |a 10.1007/b117058 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-1-4020-7838-5 | ||
| 035 | |a (OCoLC)1050942083 | ||
| 035 | |a (DE-599)BVBBV045148652 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 084 | |a ZN 4904 |0 (DE-625)157419: |2 rvk | ||
| 100 | 1 | |a Gupta, Sumit |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits |c by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau |
| 264 | 1 | |a Boston, MA |b Springer US |c 2004 | |
| 300 | |a 1 Online-Ressource (XXIII, 233 p) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 520 | |a Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 700 | 1 | |a Gupta, Rajesh K. |4 aut | |
| 700 | 1 | |a Dutt, Nikil D. |4 aut | |
| 700 | 1 | |a Nicolau, Alexandru |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781402078378 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/b117058 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_2000/2004 | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-030538351 | ||
| 966 | e | |u https://doi.org/10.1007/b117058 |l FHI01 |p ZDB-2-ENG |q ZDB-2-ENG_2000/2004 |x Verlag |3 Volltext | |
| 966 | e | |u https://doi.org/10.1007/b117058 |l BTU01 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1804178819004760064 |
|---|---|
| any_adam_object | |
| author | Gupta, Sumit Gupta, Rajesh K. Dutt, Nikil D. Nicolau, Alexandru |
| author_facet | Gupta, Sumit Gupta, Rajesh K. Dutt, Nikil D. Nicolau, Alexandru |
| author_role | aut aut aut aut |
| author_sort | Gupta, Sumit |
| author_variant | s g sg r k g rk rkg n d d nd ndd a n an |
| building | Verbundindex |
| bvnumber | BV045148652 |
| classification_rvk | ZN 4904 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-1-4020-7838-5 (OCoLC)1050942083 (DE-599)BVBBV045148652 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/b117058 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03745nmm a2200493zc 4500</leader><controlfield tag="001">BV045148652</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180827s2004 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781402078385</subfield><subfield code="9">978-1-4020-7838-5</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/b117058</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4020-7838-5</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1050942083</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045148652</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 4904</subfield><subfield code="0">(DE-625)157419:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Gupta, Sumit</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits</subfield><subfield code="c">by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">2004</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XXIII, 233 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Gupta, Rajesh K.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Dutt, Nikil D.</subfield><subfield code="4">aut</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Nicolau, Alexandru</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781402078378</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/b117058</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2000/2004</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030538351</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b117058</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_2000/2004</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/b117058</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045148652 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T08:10:01Z |
| institution | BVB |
| isbn | 9781402078385 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030538351 |
| oclc_num | 1050942083 |
| open_access_boolean | |
| owner | DE-573 DE-634 |
| owner_facet | DE-573 DE-634 |
| physical | 1 Online-Ressource (XXIII, 233 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_2000/2004 ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 2004 |
| publishDateSearch | 2004 |
| publishDateSort | 2004 |
| publisher | Springer US |
| record_format | marc |
| spelling | Gupta, Sumit Verfasser aut SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau Boston, MA Springer US 2004 1 Online-Ressource (XXIII, 233 p) txt rdacontent c rdamedia cr rdacarrier Rapid advances in microelectronic integration and the advent of Systems-on-Chip have fueled the need for high-level synthesis, i.e., an automated approach to the synthesis of hardware from behavioral descriptions. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits presents a novel approach to the high-level synthesis of digital circuits -- that of parallelizing high-level synthesis (PHLS). This approach uses aggressive code parallelizing and code motion techniques to discover circuit optimization opportunities beyond what is possible with traditional high-level synthesis. This PHLS approach addresses the problems of the poor quality of synthesis results and the lack of controllability over the transformations applied during the high-level synthesis of system descriptions with complex control flows, that is, with nested conditionals and loops. Also described are speculative code motion techniques and dynamic compiler transformations that optimize the circuit quality in terms of cycle time, circuit size and interconnect costs. We describe the SPARK parallelizing high-level synthesis framework in which we have implemented these techniques and demonstrate the utility of SPARK's PHLS approach using designs derived from multimedia and image processing applications. We also present a case study of an instruction length decoder derived from the Intel Pentium-class of microprocessors. This case study serves as an example of a typical microprocessor functional block with complex control flow and demonstrates how our techniques are useful for such designs. SPARK: A Parallelizing Approach to the High - Level Synthesis of Digital Circuits is targeted mainly to embedded system designers and researchers. This includes people working on design and design automation. The book is useful for researchers and design automation engineers who wish to understand how the main problems hindering the adoption of high-level synthesis among designers Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits Gupta, Rajesh K. aut Dutt, Nikil D. aut Nicolau, Alexandru aut Erscheint auch als Druck-Ausgabe 9781402078378 https://doi.org/10.1007/b117058 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Gupta, Sumit Gupta, Rajesh K. Dutt, Nikil D. Nicolau, Alexandru SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| title | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits |
| title_auth | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits |
| title_exact_search | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits |
| title_full | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau |
| title_fullStr | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau |
| title_full_unstemmed | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits by Sumit Gupta, Rajesh K. Gupta, Nikil D. Dutt, Alexandru Nicolau |
| title_short | SPARK: A Parallelizing Approach to the High-Level Synthesis of Digital Circuits |
| title_sort | spark a parallelizing approach to the high level synthesis of digital circuits |
| topic | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| topic_facet | Engineering Circuits and Systems Electrical Engineering Electrical engineering Electronic circuits |
| url | https://doi.org/10.1007/b117058 |
| work_keys_str_mv | AT guptasumit sparkaparallelizingapproachtothehighlevelsynthesisofdigitalcircuits AT guptarajeshk sparkaparallelizingapproachtothehighlevelsynthesisofdigitalcircuits AT duttnikild sparkaparallelizingapproachtothehighlevelsynthesisofdigitalcircuits AT nicolaualexandru sparkaparallelizingapproachtothehighlevelsynthesisofdigitalcircuits |