The Verillog Hardware Description Language:

xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural...

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Bibliographic Details
Main Authors: Thomas, Donald E. (Author), Moorby, Philip R. (Author)
Format: Electronic eBook
Language:English
Published: Boston, MA Springer US 2002
Edition:Fifth Edition
Subjects:
Online Access:FHI01
BTU01
Volltext
Summary:xv From the Old to the New xvii Acknowledgments xxi 1 Verilog – A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("
Physical Description:1 Online-Ressource (XXII, 382 p)
ISBN:9780306476662
DOI:10.1007/b116662