APA-Zitierstil (7. Ausg.)

(2008). System-on-chip test architectures: Nanometer design for testability. Morgan Kaufmann Publishers.

Chicago-Zitierstil (17. Ausg.)

System-on-chip Test Architectures: Nanometer Design for Testability. Amsterdam: Morgan Kaufmann Publishers, 2008.

MLA-Zitierstil (9. Ausg.)

System-on-chip Test Architectures: Nanometer Design for Testability. Morgan Kaufmann Publishers, 2008.