Holdings: VLSI design and test

VLSI design and test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers

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Bibliographic Details
Other Authors:	Kaushik, Brajesh Kumar (Editor), Dasgupta, Sudeb (Editor), Singh, Virendra (Editor)
Format:	Electronic eBook
Language:	English
Published:	Singapore Springer [2017]
Series:	Communications in Computer and Information Science 711
Subjects:	Computer science Computer hardware Microprocessors Computer communication systems Computer Science Computer Hardware Processor Architectures Computer Communication Networks
Online Access:	BTU01 FHA01 FHI01 FHM01 FHN01 FHR01 FKE01 FLA01 FRO01 FWS01 FWS02 HTW01 UBG01 UBM01 UBR01 UBT01 UBW01 UBY01 UER01 UPA01 Volltext
Physical Description:	1 Online-Ressource (XXI, 815 Seiten, 486 illus)
ISBN:	9789811074707
ISSN:	1865-0929
DOI:	10.1007/978-981-10-7470-7

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series	Communications in Computer and Information Science
series2	Communications in computer and information science
spellingShingle	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers Communications in Computer and Information Science Computer science Computer hardware Microprocessors Computer communication systems Computer Science Computer Hardware Processor Architectures Computer Communication Networks
title	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers
title_auth	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers
title_exact_search	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers
title_full	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh (eds.)
title_fullStr	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh (eds.)
title_full_unstemmed	VLSI design and test 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers Brajesh Kumar Kaushik, Sudeb Dasgupta, Virendra Singh (eds.)
title_short	VLSI design and test
title_sort	vlsi design and test 21st international symposium vdat 2017 roorkee india june 29 july 2 2017 revised selected papers
title_sub	21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers
topic	Computer science Computer hardware Microprocessors Computer communication systems Computer Science Computer Hardware Processor Architectures Computer Communication Networks
topic_facet	Computer science Computer hardware Microprocessors Computer communication systems Computer Science Computer Hardware Processor Architectures Computer Communication Networks
url	https://doi.org/10.1007/978-981-10-7470-7
volume_link	(DE-604)BV041227480
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