Kaushik, B. K., Dasgupta, S., & Singh, V. (2017). VLSI design and test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers. Springer. https://doi.org/10.1007/978-981-10-7470-7
Chicago Style (17th ed.) CitationKaushik, Brajesh Kumar, Sudeb Dasgupta, and Virendra Singh. VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : Revised Selected Papers. Singapore: Springer, 2017. https://doi.org/10.1007/978-981-10-7470-7.
MLA (9th ed.) CitationKaushik, Brajesh Kumar, et al. VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : Revised Selected Papers. Springer, 2017. https://doi.org/10.1007/978-981-10-7470-7.
Warning: These citations may not always be 100% accurate.