Kaushik, B. K., Dasgupta, S., & Singh, V. (2017). VLSI design and test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : revised selected papers. Springer. https://doi.org/10.1007/978-981-10-7470-7
Chicago-Zitierstil (17. Ausg.)Kaushik, Brajesh Kumar, Sudeb Dasgupta, und Virendra Singh. VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : Revised Selected Papers. Singapore: Springer, 2017. https://doi.org/10.1007/978-981-10-7470-7.
MLA-Zitierstil (9. Ausg.)Kaushik, Brajesh Kumar, et al. VLSI Design and Test: 21st International Symposium, VDAT 2017, Roorkee, India, June 29 - July 2, 2017 : Revised Selected Papers. Springer, 2017. https://doi.org/10.1007/978-981-10-7470-7.
Achtung: Diese Zitate sind unter Umständen nicht zu 100% korrekt.