FSM-based digital design using Verilog HDL:
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Chichester, England
J. Wiley & Sons
c2008
|
| Schlagworte: | |
| Beschreibung: | Includes bibliographical references and index |
| Beschreibung: | xiii, 391 p. |
| ISBN: | 9780470060704 0470060700 |
Internformat
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| 100 | 1 | |a Minns, Peter D. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a FSM-based digital design using Verilog HDL |c Peter Minns, Ian Elliott |
| 246 | 1 | 3 | |a Finite state machine based digital design using Verilog HDL |
| 264 | 1 | |a Chichester, England |b J. Wiley & Sons |c c2008 | |
| 300 | |a xiii, 391 p. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 500 | |a Includes bibliographical references and index | ||
| 650 | 4 | |a Verilog (Computer hardware description language) | |
| 650 | 4 | |a Digital electronics | |
| 650 | 4 | |a Sequential machine theory | |
| 650 | 0 | 7 | |a Digitales System |0 (DE-588)4012300-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitalelektronik |0 (DE-588)4260328-6 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Digitalelektronik |0 (DE-588)4260328-6 |D s |
| 689 | 0 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
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| 689 | 1 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
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| 700 | 1 | |a Elliott, Ian D. |e Sonstige |4 oth | |
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Datensatz im Suchindex
| _version_ | 1804177235004882944 |
|---|---|
| any_adam_object | |
| author | Minns, Peter D. |
| author_facet | Minns, Peter D. |
| author_role | aut |
| author_sort | Minns, Peter D. |
| author_variant | p d m pd pdm |
| building | Verbundindex |
| bvnumber | BV044140021 |
| collection | ZDB-30-PAD |
| ctrlnum | (ZDB-30-PAD)EBC470251 (ZDB-89-EBL)EBL470251 (OCoLC)647785527 (DE-599)BVBBV044140021 |
| dewey-full | 004/.33 |
| dewey-hundreds | 000 - Computer science, information, general works |
| dewey-ones | 004 - Computer science |
| dewey-raw | 004/.33 |
| dewey-search | 004/.33 |
| dewey-sort | 14 233 |
| dewey-tens | 000 - Computer science, information, general works |
| discipline | Informatik |
| format | Electronic eBook |
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| id | DE-604.BV044140021 |
| illustrated | Not Illustrated |
| indexdate | 2024-07-10T07:44:51Z |
| institution | BVB |
| isbn | 9780470060704 0470060700 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-029546866 |
| oclc_num | 647785527 |
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| physical | xiii, 391 p. |
| psigel | ZDB-30-PAD |
| publishDate | 2008 |
| publishDateSearch | 2008 |
| publishDateSort | 2008 |
| publisher | J. Wiley & Sons |
| record_format | marc |
| spelling | Minns, Peter D. Verfasser aut FSM-based digital design using Verilog HDL Peter Minns, Ian Elliott Finite state machine based digital design using Verilog HDL Chichester, England J. Wiley & Sons c2008 xiii, 391 p. txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index Verilog (Computer hardware description language) Digital electronics Sequential machine theory Digitales System (DE-588)4012300-5 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Digitalelektronik (DE-588)4260328-6 gnd rswk-swf Digitalelektronik (DE-588)4260328-6 s VERILOG (DE-588)4268385-3 s 1\p DE-604 Digitales System (DE-588)4012300-5 s 2\p DE-604 Elliott, Ian D. Sonstige oth 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk 2\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Minns, Peter D. FSM-based digital design using Verilog HDL Verilog (Computer hardware description language) Digital electronics Sequential machine theory Digitales System (DE-588)4012300-5 gnd VERILOG (DE-588)4268385-3 gnd Digitalelektronik (DE-588)4260328-6 gnd |
| subject_GND | (DE-588)4012300-5 (DE-588)4268385-3 (DE-588)4260328-6 |
| title | FSM-based digital design using Verilog HDL |
| title_alt | Finite state machine based digital design using Verilog HDL |
| title_auth | FSM-based digital design using Verilog HDL |
| title_exact_search | FSM-based digital design using Verilog HDL |
| title_full | FSM-based digital design using Verilog HDL Peter Minns, Ian Elliott |
| title_fullStr | FSM-based digital design using Verilog HDL Peter Minns, Ian Elliott |
| title_full_unstemmed | FSM-based digital design using Verilog HDL Peter Minns, Ian Elliott |
| title_short | FSM-based digital design using Verilog HDL |
| title_sort | fsm based digital design using verilog hdl |
| topic | Verilog (Computer hardware description language) Digital electronics Sequential machine theory Digitales System (DE-588)4012300-5 gnd VERILOG (DE-588)4268385-3 gnd Digitalelektronik (DE-588)4260328-6 gnd |
| topic_facet | Verilog (Computer hardware description language) Digital electronics Sequential machine theory Digitales System VERILOG Digitalelektronik |
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