Design and modeling for 3D ICs and interposers:
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Hackensack, NJ
World Scientific
2014
|
Schriftenreihe: | WSPC series in advanced integration and packaging
2 |
Schlagworte: | |
Online-Zugang: | FAW01 FAW02 Volltext |
Beschreibung: | Description based on print version record |
Beschreibung: | 1 online resource (200 pages) |
ISBN: | 9789814508599 9789814508605 9814508594 9814508608 |
Internformat
MARC
LEADER | 00000nmm a2200000zcb4500 | ||
---|---|---|---|
001 | BV043039491 | ||
003 | DE-604 | ||
005 | 00000000000000.0 | ||
007 | cr|uuu---uuuuu | ||
008 | 151120s2014 |||| o||u| ||||||eng d | ||
020 | |a 9789814508599 |9 978-981-4508-59-9 | ||
020 | |a 9789814508605 |c electronic bk. |9 978-981-4508-60-5 | ||
020 | |a 9814508594 |9 981-4508-59-4 | ||
020 | |a 9814508608 |c electronic bk. |9 981-4508-60-8 | ||
035 | |a (OCoLC)868319143 | ||
035 | |a (DE-599)BVBBV043039491 | ||
040 | |a DE-604 |b ger |e rda | ||
041 | 0 | |a eng | |
049 | |a DE-1046 |a DE-1047 | ||
082 | 0 | |a 23 | |
082 | 0 | |a 621.4 |2 22 | |
100 | 1 | |a Swaminathan, Madhavan |e Verfasser |4 aut | |
245 | 1 | 0 | |a Design and modeling for 3D ICs and interposers |c by Madhavan Swaminathan, Ki Jin Han |
264 | 1 | |a Hackensack, NJ |b World Scientific |c 2014 | |
300 | |a 1 online resource (200 pages) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
490 | 0 | |a WSPC series in advanced integration and packaging |v 2 | |
500 | |a Description based on print version record | ||
505 | 8 | |a Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration -- what is the difference? 1.3. History of integration -- an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary -- ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary -- | |
505 | 8 | |a ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias -- an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary -- ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary -- ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution -- an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity -- | |
505 | 8 | |a does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary -- ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary | |
505 | 8 | |a 3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution | |
650 | 7 | |a TECHNOLOGY & ENGINEERING / Mechanical |2 bisacsh | |
650 | 7 | |a Three-dimensional integrated circuits |2 fast | |
650 | 4 | |a Three-dimensional integrated circuits | |
650 | 0 | 7 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Dreidimensionale Integration |0 (DE-588)4218841-6 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Integrierte Schaltung |0 (DE-588)4027242-4 |D s |
689 | 0 | 1 | |a Dreidimensionale Integration |0 (DE-588)4218841-6 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |a Swaminathan, Madhavan |t Design and modeling for 3D ICs and interposers |
856 | 4 | 0 | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634 |x Aggregator |3 Volltext |
912 | |a ZDB-4-EBA | ||
999 | |a oai:aleph.bib-bvb.de:BVB01-028464138 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634 |l FAW01 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext | |
966 | e | |u http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634 |l FAW02 |p ZDB-4-EBA |q FAW_PDA_EBA |x Aggregator |3 Volltext |
Datensatz im Suchindex
_version_ | 1804175402251321344 |
---|---|
any_adam_object | |
author | Swaminathan, Madhavan |
author_facet | Swaminathan, Madhavan |
author_role | aut |
author_sort | Swaminathan, Madhavan |
author_variant | m s ms |
building | Verbundindex |
bvnumber | BV043039491 |
collection | ZDB-4-EBA |
contents | Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration -- what is the difference? 1.3. History of integration -- an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary -- ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary -- ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias -- an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary -- ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary -- ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution -- an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity -- does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary -- ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary 3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution |
ctrlnum | (OCoLC)868319143 (DE-599)BVBBV043039491 |
dewey-full | 23 621.4 |
dewey-hundreds | 000 - Computer science, information, general works 600 - Technology (Applied sciences) |
dewey-ones | 023 - Personnel management 621 - Applied physics |
dewey-raw | 23 621.4 |
dewey-search | 23 621.4 |
dewey-sort | 223 |
dewey-tens | 020 - Library and information sciences 620 - Engineering and allied operations |
discipline | Theologie / Religionswissenschaften |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>05279nmm a2200553zcb4500</leader><controlfield tag="001">BV043039491</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">151120s2014 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789814508599</subfield><subfield code="9">978-981-4508-59-9</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789814508605</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">978-981-4508-60-5</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9814508594</subfield><subfield code="9">981-4508-59-4</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9814508608</subfield><subfield code="c">electronic bk.</subfield><subfield code="9">981-4508-60-8</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)868319143</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV043039491</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rda</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1046</subfield><subfield code="a">DE-1047</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">23</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.4</subfield><subfield code="2">22</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Swaminathan, Madhavan</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Design and modeling for 3D ICs and interposers</subfield><subfield code="c">by Madhavan Swaminathan, Ki Jin Han</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Hackensack, NJ</subfield><subfield code="b">World Scientific</subfield><subfield code="c">2014</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 online resource (200 pages)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">WSPC series in advanced integration and packaging</subfield><subfield code="v">2</subfield></datafield><datafield tag="500" ind1=" " ind2=" "><subfield code="a">Description based on print version record</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration -- what is the difference? 1.3. History of integration -- an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary -- ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary -- </subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias -- an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary -- ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary -- ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution -- an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity -- </subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary -- ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary</subfield></datafield><datafield tag="505" ind1="8" ind2=" "><subfield code="a">3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">TECHNOLOGY & ENGINEERING / Mechanical</subfield><subfield code="2">bisacsh</subfield></datafield><datafield tag="650" ind1=" " ind2="7"><subfield code="a">Three-dimensional integrated circuits</subfield><subfield code="2">fast</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Three-dimensional integrated circuits</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Dreidimensionale Integration</subfield><subfield code="0">(DE-588)4218841-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Integrierte Schaltung</subfield><subfield code="0">(DE-588)4027242-4</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Dreidimensionale Integration</subfield><subfield code="0">(DE-588)4218841-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="a">Swaminathan, Madhavan</subfield><subfield code="t">Design and modeling for 3D ICs and interposers</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-4-EBA</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028464138</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634</subfield><subfield code="l">FAW01</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634</subfield><subfield code="l">FAW02</subfield><subfield code="p">ZDB-4-EBA</subfield><subfield code="q">FAW_PDA_EBA</subfield><subfield code="x">Aggregator</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV043039491 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T07:15:43Z |
institution | BVB |
isbn | 9789814508599 9789814508605 9814508594 9814508608 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028464138 |
oclc_num | 868319143 |
open_access_boolean | |
owner | DE-1046 DE-1047 |
owner_facet | DE-1046 DE-1047 |
physical | 1 online resource (200 pages) |
psigel | ZDB-4-EBA ZDB-4-EBA FAW_PDA_EBA |
publishDate | 2014 |
publishDateSearch | 2014 |
publishDateSort | 2014 |
publisher | World Scientific |
record_format | marc |
series2 | WSPC series in advanced integration and packaging |
spelling | Swaminathan, Madhavan Verfasser aut Design and modeling for 3D ICs and interposers by Madhavan Swaminathan, Ki Jin Han Hackensack, NJ World Scientific 2014 1 online resource (200 pages) txt rdacontent c rdamedia cr rdacarrier WSPC series in advanced integration and packaging 2 Description based on print version record Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration -- what is the difference? 1.3. History of integration -- an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary -- ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary -- ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias -- an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary -- ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary -- ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution -- an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity -- does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary -- ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary 3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution TECHNOLOGY & ENGINEERING / Mechanical bisacsh Three-dimensional integrated circuits fast Three-dimensional integrated circuits Integrierte Schaltung (DE-588)4027242-4 gnd rswk-swf Dreidimensionale Integration (DE-588)4218841-6 gnd rswk-swf Integrierte Schaltung (DE-588)4027242-4 s Dreidimensionale Integration (DE-588)4218841-6 s 1\p DE-604 Erscheint auch als Druck-Ausgabe Swaminathan, Madhavan Design and modeling for 3D ICs and interposers http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
spellingShingle | Swaminathan, Madhavan Design and modeling for 3D ICs and interposers Ch. 1. System integration and modeling concepts. 1.1. Moore's law. 1.2. IC integration vs system integration -- what is the difference? 1.3. History of integration -- an overview. 1.4. Primary drivers for 3D integration. 1.5. Role of the interposer in 3D integration. 1.6. Modeling and simulation. 1.7. Summary -- ch. 2. Modeling of cylindrical interconnections. 2.1. Introduction. 2.2. Specialized basis functions. 2.3. Electric field integral equation (EFIE) with cylindrical CMBF for resistance and inductance extraction. 2.4. Scalar potential integral equation (SPIE) with cylindrical AMBF for conductance and capacitance extraction. 2.5. Broadband equivalent RLC network. 2.6. Inclusion of planar structures. 2.7. Examples with bonding wires. 2.8. Examples with vias. 2.9. Example of package on package. 2.10. Summary -- ch. 3. Electrical modeling of through silicon vias. 3.1. Benefits of through silicon vias. 3.2. Challenges in modeling through silicon vias. 3.3. Propagating modes in through silicon vias -- an electromagnetic perspective. 3.4. Physics based modeling of through silicon vias. 3.5. Rigorous electromagnetic modeling. 3.6. Modeling of conical through silicon via. 3.7. MOS capacitance effect. 3.8. Consideration of MOS capacitance effect in electromagnetic modeling. 3.9. Time domain response. 3.10. Summary -- ch. 4. Electrical performance and signal integrity. 4.1. Process optimization. 4.2. Cross talk in interposers. 4.3. Via arrays. 4.4. Interposers. 4.5. Modeling and design challenges. 4.6. Summary -- ch. 5. Power distribution, return path discontinuities and thermal management. 5.1. Power distribution -- an overview. 5.2. Power distribution for 3D integration. 5.3. Current paths in IC and package. 5.4. Signal and power integrity -- does one affect the other? 5.5. Challenges for addressing power distribution in 3D ICs and interposers. 5.6. Thermal management and its effect on power distribution. 5.7. Summary -- ch. 6. Alternate methods for power distribution. 6.1. Introducing power transmission lines. 6.2. Constant current power transmission line (CCPTL). 6.3. Pseudo balanced power transmission line (PBPTL). 6.4. Constant voltage power transmission line (CVPTL). 6.5. Power calculations. 6.6. Application of power transmission lines to FPGA. 6.7. Managing signal and power integrity for 3D ICs. 6.8. Summary 3D Integration is being touted as the next semiconductor revolution. This book provides a comprehensive coverage on the design and modeling aspects of 3D integration, in particularly, focus on its electrical behavior. Looking from the perspective the silicon via (TSV) and glass via (TGV) technology, the book introduces 3D ICs and Interposers as a technology, and presents its application in numerical modeling, signal integrity, power integrity and thermal integrity. The authors underscored the potential of this technology in design exchange formats and power distribution TECHNOLOGY & ENGINEERING / Mechanical bisacsh Three-dimensional integrated circuits fast Three-dimensional integrated circuits Integrierte Schaltung (DE-588)4027242-4 gnd Dreidimensionale Integration (DE-588)4218841-6 gnd |
subject_GND | (DE-588)4027242-4 (DE-588)4218841-6 |
title | Design and modeling for 3D ICs and interposers |
title_auth | Design and modeling for 3D ICs and interposers |
title_exact_search | Design and modeling for 3D ICs and interposers |
title_full | Design and modeling for 3D ICs and interposers by Madhavan Swaminathan, Ki Jin Han |
title_fullStr | Design and modeling for 3D ICs and interposers by Madhavan Swaminathan, Ki Jin Han |
title_full_unstemmed | Design and modeling for 3D ICs and interposers by Madhavan Swaminathan, Ki Jin Han |
title_short | Design and modeling for 3D ICs and interposers |
title_sort | design and modeling for 3d ics and interposers |
topic | TECHNOLOGY & ENGINEERING / Mechanical bisacsh Three-dimensional integrated circuits fast Three-dimensional integrated circuits Integrierte Schaltung (DE-588)4027242-4 gnd Dreidimensionale Integration (DE-588)4218841-6 gnd |
topic_facet | TECHNOLOGY & ENGINEERING / Mechanical Three-dimensional integrated circuits Integrierte Schaltung Dreidimensionale Integration |
url | http://search.ebscohost.com/login.aspx?direct=true&scope=site&db=nlebk&db=nlabk&AN=670634 |
work_keys_str_mv | AT swaminathanmadhavan designandmodelingfor3dicsandinterposers |