VLSI physical design: from graph partitioning to timing closure
Gespeichert in:
Format: | Elektronisch E-Book |
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Sprache: | English |
Veröffentlicht: |
Dordrecht [u.a.]
Springer
2011
|
Schlagworte: | |
Beschreibung: | 1 Online-Ressource (XI, 310 S.) graph. Darst. |
ISBN: | 9789048195916 |
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Datensatz im Suchindex
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id | DE-604.BV042908407 |
illustrated | Not Illustrated |
indexdate | 2024-07-10T07:12:34Z |
institution | BVB |
isbn | 9789048195916 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028336297 |
oclc_num | 707187543 |
open_access_boolean | |
owner | DE-739 |
owner_facet | DE-739 |
physical | 1 Online-Ressource (XI, 310 S.) graph. Darst. |
psigel | ZDB-89-EBL |
publishDate | 2011 |
publishDateSearch | 2011 |
publishDateSort | 2011 |
publisher | Springer |
record_format | marc |
spelling | VLSI physical design from graph partitioning to timing closure Andrew B. Kahng [u.a.] Dordrecht [u.a.] Springer 2011 1 Online-Ressource (XI, 310 S.) graph. Darst. txt rdacontent c rdamedia cr rdacarrier Ingenieurwissenschaften Engineering Logic design Computer aided design Electronics Systems engineering Circuits and Systems Logic Design Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design VLSI (DE-588)4117388-0 gnd rswk-swf Integrated circuits / Very large scale integration / Design and construction VLSI (DE-588)4117388-0 s DE-604 Kahng, Andrew B. 1963- Sonstige (DE-588)143791435 oth Erscheint auch als Druck-Ausgabe, Hardcover 978-90-481-9590-9 Erscheint auch als Druck-Ausgabe, Hardcover 90-481-9590-X |
spellingShingle | VLSI physical design from graph partitioning to timing closure Ingenieurwissenschaften Engineering Logic design Computer aided design Electronics Systems engineering Circuits and Systems Logic Design Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design VLSI (DE-588)4117388-0 gnd |
subject_GND | (DE-588)4117388-0 |
title | VLSI physical design from graph partitioning to timing closure |
title_auth | VLSI physical design from graph partitioning to timing closure |
title_exact_search | VLSI physical design from graph partitioning to timing closure |
title_full | VLSI physical design from graph partitioning to timing closure Andrew B. Kahng [u.a.] |
title_fullStr | VLSI physical design from graph partitioning to timing closure Andrew B. Kahng [u.a.] |
title_full_unstemmed | VLSI physical design from graph partitioning to timing closure Andrew B. Kahng [u.a.] |
title_short | VLSI physical design |
title_sort | vlsi physical design from graph partitioning to timing closure |
title_sub | from graph partitioning to timing closure |
topic | Ingenieurwissenschaften Engineering Logic design Computer aided design Electronics Systems engineering Circuits and Systems Logic Design Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design VLSI (DE-588)4117388-0 gnd |
topic_facet | Ingenieurwissenschaften Engineering Logic design Computer aided design Electronics Systems engineering Circuits and Systems Logic Design Electronics and Microelectronics, Instrumentation Computer-Aided Engineering (CAD, CAE) and Design VLSI |
work_keys_str_mv | AT kahngandrewb vlsiphysicaldesignfromgraphpartitioningtotimingclosure |