FPGA design: Best practices for team-based reuse
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Elektronisch E-Book |
Sprache: | English |
Veröffentlicht: |
Cham [u.a.]
Springer
2015
|
Ausgabe: | 2. ed. |
Schlagworte: | |
Online-Zugang: | BHS01 BTU01 FAB01 FAW01 FHA01 FHI01 FHN01 FHR01 FKE01 FRO01 FWS01 FWS02 UBY01 Volltext Inhaltsverzeichnis Abstract |
Beschreibung: | 1 Online-Ressource (XI, 257 p. 129 illus., 85 illus. in color) |
ISBN: | 9783319179247 |
DOI: | 10.1007/978-3-319-17924-7 |
Internformat
MARC
LEADER | 00000nmm a2200000zc 4500 | ||
---|---|---|---|
001 | BV042592243 | ||
003 | DE-604 | ||
005 | 20150604 | ||
007 | cr|uuu---uuuuu | ||
008 | 150602s2015 |||| o||u| ||||||eng d | ||
020 | |a 9783319179247 |c Online |9 978-3-319-17924-7 | ||
024 | 7 | |a 10.1007/978-3-319-17924-7 |2 doi | |
035 | |a (OCoLC)910752247 | ||
035 | |a (DE-599)BVBBV042592243 | ||
040 | |a DE-604 |b ger |e aacr | ||
041 | 0 | |a eng | |
049 | |a DE-1046 |a DE-1043 |a DE-B768 |a DE-Aug4 |a DE-898 |a DE-573 |a DE-859 |a DE-863 |a DE-634 |a DE-92 |a DE-862 |a DE-861 |a DE-706 | ||
082 | 0 | |a 621.3815 |2 23 | |
100 | 1 | |a Simpson, Philip Andrew |e Verfasser |4 aut | |
245 | 1 | 0 | |a FPGA design |b Best practices for team-based reuse |c Philip Andrew Simpson |
250 | |a 2. ed. | ||
264 | 1 | |a Cham [u.a.] |b Springer |c 2015 | |
300 | |a 1 Online-Ressource (XI, 257 p. 129 illus., 85 illus. in color) | ||
336 | |b txt |2 rdacontent | ||
337 | |b c |2 rdamedia | ||
338 | |b cr |2 rdacarrier | ||
650 | 4 | |a Engineering | |
650 | 4 | |a Computer science | |
650 | 4 | |a Electronics | |
650 | 4 | |a Systems engineering | |
650 | 4 | |a Circuits and Systems | |
650 | 4 | |a Processor Architectures | |
650 | 4 | |a Electronics and Microelectronics, Instrumentation | |
650 | 4 | |a Informatik | |
650 | 4 | |a Ingenieurwissenschaften | |
650 | 0 | 7 | |a Entwurf |0 (DE-588)4121208-3 |2 gnd |9 rswk-swf |
650 | 0 | 7 | |a Field programmable gate array |0 (DE-588)4347749-5 |2 gnd |9 rswk-swf |
689 | 0 | 0 | |a Field programmable gate array |0 (DE-588)4347749-5 |D s |
689 | 0 | 1 | |a Entwurf |0 (DE-588)4121208-3 |D s |
689 | 0 | |8 1\p |5 DE-604 | |
776 | 0 | 8 | |i Erscheint auch als |n Druckausgabe |z 978-3-319-17923-0 |
856 | 4 | 0 | |u https://doi.org/10.1007/978-3-319-17924-7 |x Verlag |3 Volltext |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |3 Inhaltsverzeichnis |
856 | 4 | 2 | |m Springer Fremddatenuebernahme |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |3 Abstract |
912 | |a ZDB-2-ENG | ||
940 | 1 | |q ZDB-2-ENG_2015 | |
999 | |a oai:aleph.bib-bvb.de:BVB01-028025455 | ||
883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l BHS01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l BTU01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FAB01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FAW01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FHA01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FHI01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FHN01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FHR01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FKE01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FRO01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FWS01 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l FWS02 |p ZDB-2-ENG |x Verlag |3 Volltext | |
966 | e | |u https://doi.org/10.1007/978-3-319-17924-7 |l UBY01 |p ZDB-2-ENG |x Verlag |3 Volltext |
Datensatz im Suchindex
DE-BY-FWS_katkey | 563817 |
---|---|
_version_ | 1806179297900101632 |
adam_text | FPGA DESIGN
/ SIMPSON, PHILIP ANDREW
: 2015
TABLE OF CONTENTS / INHALTSVERZEICHNIS
INTRODUCTION
PROJECT MANAGEMENT
DESIGN SPECIFICATION
SYSTEM MODELING
RESOURCE SCOPING
DESIGN ENVIRONMENT
BOARD DESIGN
POWER AND THERMAL ANALYSIS
TEAM BASED DESIGN
RTL DESIGN
IP REUSE
EMBEDDED DESIGN
FUNCTIONAL VERIFICATION
TIMING CLOSURE
HIGH LEVEL DESIGN
IN SYSTEM DEBUG
DESIGN SIGN-OFF
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
FPGA DESIGN
/ SIMPSON, PHILIP ANDREW
: 2015
ABSTRACT / INHALTSTEXT
THIS BOOK DESCRIBES BEST PRACTICES FOR SUCCESSFUL FPGA DESIGN. IT IS THE
RESULT OF THE AUTHOR’S MEETINGS WITH HUNDREDS OF CUSTOMERS ON THE
CHALLENGES FACING EACH OF THEIR FPGA DESIGN TEAMS. BY GAINING AN
UNDERSTANDING INTO THEIR DESIGN ENVIRONMENTS, PROCESSES, WHAT WORKS AND
WHAT DOES NOT WORK, KEY AREAS OF CONCERN IN IMPLEMENTING SYSTEM DESIGNS
HAVE BEEN IDENTIFIED AND A RECOMMENDED DESIGN METHODOLOGY TO OVERCOME
THESE CHALLENGES HAS BEEN DEVELOPED. THIS BOOK’S CONTENT HAS A STRONG
FOCUS ON DESIGN TEAMS THAT ARE SPREAD ACROSS SITES. THE GOAL BEING TO
INCREASE THE PRODUCTIVITY OF FPGA DESIGN TEAMS BY ESTABLISHING A COMMON
METHODOLOGY ACROSS DESIGN TEAMS; ENABLING THE EXCHANGE OF DESIGN BLOCKS
ACROSS TEAMS. COVERAGE INCLUDES THE COMPLETE FPGA DESIGN FLOW, FROM THE
BASICS TO ADVANCED TECHNIQUES. THIS NEW EDITION HAS BEEN ENHANCED TO
INCLUDE NEW SECTIONS ON SYSTEM MODELING, EMBEDDED DESIGN AND HIGH LEVEL
DESIGN. THE ORIGINAL SECTIONS ON DESIGN ENVIRONMENT, RTL DESIGN AND
TIMING CLOSURE HAVE ALL BEEN EXPANDED TO INCLUDE MORE UP TO DATE
TECHNIQUES AS WELL AS PROVIDING MORE EXTENSIVE SCRIPTS AND RTL CODE THAT
CAN BE REUSED BY READERS. PRESENTS COMPLETE, FIELD-TESTED METHODOLOGY
FOR FPGA DESIGN, FOCUSED ON REUSE ACROSS DESIGN TEAMS; OFFERS BEST
PRACTICES FOR FPGA TIMING CLOSURE, IN-SYSTEM DEBUG, AND BOARD DESIGN;
DETAILS TECHNIQUES TO RESOLVE COMMON PITFALLS IN DESIGNING WITH FPGAS
DIESES SCHRIFTSTUECK WURDE MASCHINELL ERZEUGT.
|
any_adam_object | 1 |
author | Simpson, Philip Andrew |
author_facet | Simpson, Philip Andrew |
author_role | aut |
author_sort | Simpson, Philip Andrew |
author_variant | p a s pa pas |
building | Verbundindex |
bvnumber | BV042592243 |
collection | ZDB-2-ENG |
ctrlnum | (OCoLC)910752247 (DE-599)BVBBV042592243 |
dewey-full | 621.3815 |
dewey-hundreds | 600 - Technology (Applied sciences) |
dewey-ones | 621 - Applied physics |
dewey-raw | 621.3815 |
dewey-search | 621.3815 |
dewey-sort | 3621.3815 |
dewey-tens | 620 - Engineering and allied operations |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
doi_str_mv | 10.1007/978-3-319-17924-7 |
edition | 2. ed. |
format | Electronic eBook |
fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>03618nmm a2200697zc 4500</leader><controlfield tag="001">BV042592243</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20150604 </controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">150602s2015 |||| o||u| ||||||eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9783319179247</subfield><subfield code="c">Online</subfield><subfield code="9">978-3-319-17924-7</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-3-319-17924-7</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)910752247</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV042592243</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-1046</subfield><subfield code="a">DE-1043</subfield><subfield code="a">DE-B768</subfield><subfield code="a">DE-Aug4</subfield><subfield code="a">DE-898</subfield><subfield code="a">DE-573</subfield><subfield code="a">DE-859</subfield><subfield code="a">DE-863</subfield><subfield code="a">DE-634</subfield><subfield code="a">DE-92</subfield><subfield code="a">DE-862</subfield><subfield code="a">DE-861</subfield><subfield code="a">DE-706</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Simpson, Philip Andrew</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">FPGA design</subfield><subfield code="b">Best practices for team-based reuse</subfield><subfield code="c">Philip Andrew Simpson</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">2. ed.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Cham [u.a.]</subfield><subfield code="b">Springer</subfield><subfield code="c">2015</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XI, 257 p. 129 illus., 85 illus. in color)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Computer science</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Systems engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Processor Architectures</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronics and Microelectronics, Instrumentation</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Informatik</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Ingenieurwissenschaften</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Field programmable gate array</subfield><subfield code="0">(DE-588)4347749-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Entwurf</subfield><subfield code="0">(DE-588)4121208-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druckausgabe</subfield><subfield code="z">978-3-319-17923-0</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Inhaltsverzeichnis</subfield></datafield><datafield tag="856" ind1="4" ind2="2"><subfield code="m">Springer Fremddatenuebernahme</subfield><subfield code="q">application/pdf</subfield><subfield code="u">http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA</subfield><subfield code="3">Abstract</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_2015</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028025455</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">BHS01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">BTU01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FAB01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FAW01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FHA01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FHI01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FHN01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FHR01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FKE01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FRO01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FWS01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">FWS02</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-3-319-17924-7</subfield><subfield code="l">UBY01</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
id | DE-604.BV042592243 |
illustrated | Not Illustrated |
indexdate | 2024-08-01T12:06:47Z |
institution | BVB |
isbn | 9783319179247 |
language | English |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028025455 |
oclc_num | 910752247 |
open_access_boolean | |
owner | DE-1046 DE-1043 DE-B768 DE-Aug4 DE-898 DE-BY-UBR DE-573 DE-859 DE-863 DE-BY-FWS DE-634 DE-92 DE-862 DE-BY-FWS DE-861 DE-706 |
owner_facet | DE-1046 DE-1043 DE-B768 DE-Aug4 DE-898 DE-BY-UBR DE-573 DE-859 DE-863 DE-BY-FWS DE-634 DE-92 DE-862 DE-BY-FWS DE-861 DE-706 |
physical | 1 Online-Ressource (XI, 257 p. 129 illus., 85 illus. in color) |
psigel | ZDB-2-ENG ZDB-2-ENG_2015 |
publishDate | 2015 |
publishDateSearch | 2015 |
publishDateSort | 2015 |
publisher | Springer |
record_format | marc |
spellingShingle | Simpson, Philip Andrew FPGA design Best practices for team-based reuse Engineering Computer science Electronics Systems engineering Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Informatik Ingenieurwissenschaften Entwurf (DE-588)4121208-3 gnd Field programmable gate array (DE-588)4347749-5 gnd |
subject_GND | (DE-588)4121208-3 (DE-588)4347749-5 |
title | FPGA design Best practices for team-based reuse |
title_auth | FPGA design Best practices for team-based reuse |
title_exact_search | FPGA design Best practices for team-based reuse |
title_full | FPGA design Best practices for team-based reuse Philip Andrew Simpson |
title_fullStr | FPGA design Best practices for team-based reuse Philip Andrew Simpson |
title_full_unstemmed | FPGA design Best practices for team-based reuse Philip Andrew Simpson |
title_short | FPGA design |
title_sort | fpga design best practices for team based reuse |
title_sub | Best practices for team-based reuse |
topic | Engineering Computer science Electronics Systems engineering Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Informatik Ingenieurwissenschaften Entwurf (DE-588)4121208-3 gnd Field programmable gate array (DE-588)4347749-5 gnd |
topic_facet | Engineering Computer science Electronics Systems engineering Circuits and Systems Processor Architectures Electronics and Microelectronics, Instrumentation Informatik Ingenieurwissenschaften Entwurf Field programmable gate array |
url | https://doi.org/10.1007/978-3-319-17924-7 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=028025455&sequence=000003&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT simpsonphilipandrew fpgadesignbestpracticesforteambasedreuse |