Digital principles & system design using Verilog HDL: [a conceptual approach]
Saved in:
| Main Authors: | , |
|---|---|
| Format: | Book |
| Language: | English |
| Published: |
Pune
Technical Publ.
2014
|
| Edition: | 1. ed. |
| Subjects: | |
| Physical Description: | Getr. Zählung Ill., graph. Darst. |
| ISBN: | 9789350992449 9789350994306 |
Staff View
MARC
| LEADER | 00000nam a2200000 c 4500 | ||
|---|---|---|---|
| 001 | BV042576209 | ||
| 003 | DE-604 | ||
| 005 | 20150603 | ||
| 007 | t | ||
| 008 | 150522s2014 ad|| |||| 00||| eng d | ||
| 020 | |a 9789350992449 |9 978-93-5099-244-9 | ||
| 020 | |a 9789350994306 |9 978-93-5099-430-6 | ||
| 035 | |a (OCoLC)910729509 | ||
| 035 | |a (DE-599)BVBBV042576209 | ||
| 040 | |a DE-604 |b ger |e rakwb | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-573 | ||
| 084 | |a ZN 5600 |0 (DE-625)157468: |2 rvk | ||
| 100 | 1 | |a Godse, Atul P. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Digital principles & system design using Verilog HDL |b [a conceptual approach] |c Atul P. Godse ; Deepali A. Godse |
| 246 | 1 | 3 | |a Digital principles and system design unsing Verilog HDL |
| 250 | |a 1. ed. | ||
| 264 | 1 | |a Pune |b Technical Publ. |c 2014 | |
| 300 | |a Getr. Zählung |b Ill., graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 0 | 7 | |a Digitales System |0 (DE-588)4012300-5 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a Digitalelektronik |0 (DE-588)4260328-6 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VERILOG |0 (DE-588)4268385-3 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Digitales System |0 (DE-588)4012300-5 |D s |
| 689 | 0 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 0 | |5 DE-604 | |
| 689 | 1 | 0 | |a Digitalelektronik |0 (DE-588)4260328-6 |D s |
| 689 | 1 | 1 | |a VERILOG |0 (DE-588)4268385-3 |D s |
| 689 | 1 | |5 DE-604 | |
| 700 | 1 | |a Godse, Deepali A. |e Verfasser |0 (DE-588)1071900145 |4 aut | |
| 999 | |a oai:aleph.bib-bvb.de:BVB01-028009673 | ||
Record in the Search Index
| _version_ | 1804174731727863808 |
|---|---|
| any_adam_object | |
| author | Godse, Atul P. Godse, Deepali A. |
| author_GND | (DE-588)1071900145 |
| author_facet | Godse, Atul P. Godse, Deepali A. |
| author_role | aut aut |
| author_sort | Godse, Atul P. |
| author_variant | a p g ap apg d a g da dag |
| building | Verbundindex |
| bvnumber | BV042576209 |
| classification_rvk | ZN 5600 |
| ctrlnum | (OCoLC)910729509 (DE-599)BVBBV042576209 |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| edition | 1. ed. |
| format | Book |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01481nam a2200421 c 4500</leader><controlfield tag="001">BV042576209</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20150603 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">150522s2014 ad|| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789350992449</subfield><subfield code="9">978-93-5099-244-9</subfield></datafield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9789350994306</subfield><subfield code="9">978-93-5099-430-6</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)910729509</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV042576209</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-573</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ZN 5600</subfield><subfield code="0">(DE-625)157468:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Godse, Atul P.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Digital principles & system design using Verilog HDL</subfield><subfield code="b">[a conceptual approach]</subfield><subfield code="c">Atul P. Godse ; Deepali A. Godse</subfield></datafield><datafield tag="246" ind1="1" ind2="3"><subfield code="a">Digital principles and system design unsing Verilog HDL</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">1. ed.</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Pune</subfield><subfield code="b">Technical Publ.</subfield><subfield code="c">2014</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">Getr. Zählung</subfield><subfield code="b">Ill., graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitales System</subfield><subfield code="0">(DE-588)4012300-5</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Digitalelektronik</subfield><subfield code="0">(DE-588)4260328-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Digitales System</subfield><subfield code="0">(DE-588)4012300-5</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="689" ind1="1" ind2="0"><subfield code="a">Digitalelektronik</subfield><subfield code="0">(DE-588)4260328-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2="1"><subfield code="a">VERILOG</subfield><subfield code="0">(DE-588)4268385-3</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="1" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Godse, Deepali A.</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)1071900145</subfield><subfield code="4">aut</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-028009673</subfield></datafield></record></collection> |
| id | DE-604.BV042576209 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T07:05:03Z |
| institution | BVB |
| isbn | 9789350992449 9789350994306 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-028009673 |
| oclc_num | 910729509 |
| open_access_boolean | |
| owner | DE-573 |
| owner_facet | DE-573 |
| physical | Getr. Zählung Ill., graph. Darst. |
| publishDate | 2014 |
| publishDateSearch | 2014 |
| publishDateSort | 2014 |
| publisher | Technical Publ. |
| record_format | marc |
| spelling | Godse, Atul P. Verfasser aut Digital principles & system design using Verilog HDL [a conceptual approach] Atul P. Godse ; Deepali A. Godse Digital principles and system design unsing Verilog HDL 1. ed. Pune Technical Publ. 2014 Getr. Zählung Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Digitales System (DE-588)4012300-5 gnd rswk-swf Digitalelektronik (DE-588)4260328-6 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Digitales System (DE-588)4012300-5 s VERILOG (DE-588)4268385-3 s DE-604 Digitalelektronik (DE-588)4260328-6 s Godse, Deepali A. Verfasser (DE-588)1071900145 aut |
| spellingShingle | Godse, Atul P. Godse, Deepali A. Digital principles & system design using Verilog HDL [a conceptual approach] Digitales System (DE-588)4012300-5 gnd Digitalelektronik (DE-588)4260328-6 gnd VERILOG (DE-588)4268385-3 gnd |
| subject_GND | (DE-588)4012300-5 (DE-588)4260328-6 (DE-588)4268385-3 |
| title | Digital principles & system design using Verilog HDL [a conceptual approach] |
| title_alt | Digital principles and system design unsing Verilog HDL |
| title_auth | Digital principles & system design using Verilog HDL [a conceptual approach] |
| title_exact_search | Digital principles & system design using Verilog HDL [a conceptual approach] |
| title_full | Digital principles & system design using Verilog HDL [a conceptual approach] Atul P. Godse ; Deepali A. Godse |
| title_fullStr | Digital principles & system design using Verilog HDL [a conceptual approach] Atul P. Godse ; Deepali A. Godse |
| title_full_unstemmed | Digital principles & system design using Verilog HDL [a conceptual approach] Atul P. Godse ; Deepali A. Godse |
| title_short | Digital principles & system design using Verilog HDL |
| title_sort | digital principles system design using verilog hdl a conceptual approach |
| title_sub | [a conceptual approach] |
| topic | Digitales System (DE-588)4012300-5 gnd Digitalelektronik (DE-588)4260328-6 gnd VERILOG (DE-588)4268385-3 gnd |
| topic_facet | Digitales System Digitalelektronik VERILOG |
| work_keys_str_mv | AT godseatulp digitalprinciplessystemdesignusingveriloghdlaconceptualapproach AT godsedeepalia digitalprinciplessystemdesignusingveriloghdlaconceptualapproach AT godseatulp digitalprinciplesandsystemdesignunsingveriloghdl AT godsedeepalia digitalprinciplesandsystemdesignunsingveriloghdl |