16-bit-microprocessor systems: structure, behavior and programming
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Buch |
Sprache: | English |
Veröffentlicht: |
Berlin [u.a.]
Springer
1985
|
Online-Zugang: | Inhaltsverzeichnis Inhaltsverzeichnis |
Beschreibung: | Dt. Ausg. u.d.T.: Flik, Thomas: Sechzehn-Bit-Mikroprozessorsysteme. - Literaturverz. S. [231] - 233 Nebentitel: Sixteen-bit microprocessor systems |
Beschreibung: | X, 238 S. graph. Darst. 25 cm |
ISBN: | 3540151648 0387151648 |
Internformat
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100 | 1 | |a Flik, Thomas |d 1943-2013 |e Verfasser |0 (DE-588)108565165 |4 aut | |
245 | 1 | 0 | |a 16-bit-microprocessor systems |b structure, behavior and programming |c Th. Flik ; H. Liebig. Transl. by G. Bisiani |
246 | 1 | 3 | |a Sixteen-bit microprocessor systems |
264 | 1 | |a Berlin [u.a.] |b Springer |c 1985 | |
300 | |a X, 238 S. |b graph. Darst. |c 25 cm | ||
336 | |b txt |2 rdacontent | ||
337 | |b n |2 rdamedia | ||
338 | |b nc |2 rdacarrier | ||
500 | |a Dt. Ausg. u.d.T.: Flik, Thomas: Sechzehn-Bit-Mikroprozessorsysteme. - Literaturverz. S. [231] - 233 | ||
500 | |a Nebentitel: Sixteen-bit microprocessor systems | ||
700 | 1 | |a Liebig, Hans |d 1939- |e Verfasser |0 (DE-588)172226147 |4 aut | |
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999 | |a oai:aleph.bib-bvb.de:BVB01-027757993 |
Datensatz im Suchindex
_version_ | 1804152919872765952 |
---|---|
adam_text | TABLE OF CONTENTS
1 INTRODUCTION TO THE STRUCTURE AND THE PROGRAMMING
OF A MICROPROCESSOR
1
1.1 REPRESENTATION OF INFORMATION 2
1.1.1 INFORMATION UNITS 2
1.1.2 NUMBER REPRESENTATION 3
1.1.3 SYMBOL REPRESENTATION 5
1.1.4 HEXADECIMAL AND OCTAL REPRESENTATION ..
. 5
1.2 INTRODUCTION T
O THE HARDWARE STRUCTURE 7
1.2.1 HARDWARE COMPONENTS OF A MICROPROCESSOR
SYSTEM 7
1.2.2 BASIC SYSTEM STRUCTURE 8
1.2.3 THE MICROPROCESSOR 10
1.2.4 THE MEMORY 16
1.2.5 I/
O UNIT 18
1.3 INTRODUCTION TO ASSEMBLY LANGUAGE PROGRAMMING . 19
1.3.1 PROGRAM REPRESENTATION 19
1.3.2 PROGRAM TRANSLATION (ASSEMBLING) ...
. 23
1.3.3 PROGRAM INPUT AND TEXT OUTPU
T 29
2 THE 16-BIT MICROPROCESSOR
30
2.1 MICROPROCESSOR STRUCTURE 31
2.1.1 PROGRAMMING MODEL 31
2.1.2 DATA TYPES, DAT
A FORMATS AND DAT
A ACCESS . . 35
2.1.3 EXTENDE
D ADDRESS SPACE 38
2.1.4 INSTRUCTION FORMATS AND ADDRESSING MODES . . 39
2.2 INSTRUCTION SET 44
2.2.1 DAT
A TRANSFER INSTRUCTIONS 45
2.2.2 ARITHMETIC INSTRUCTIONS 49
2.2.3 LOGIC INSTRUCTIONS 51
2.2.4 BIT PROCESSING INSTRUCTIONS 52
2.2.5 SHIFT AND ROTAT
E INSTRUCTIONS 53
2.2.6 JUM
P INSTRUCTIONS 54
2.2.7 STRING INSTRUCTIONS 57
2.2.8 SYSTEM INSTRUCTIONS 58
2.3 EXCEPTION PROCESSING 59
2.3.1 TRA
P AND INTERRUP
T MANAGEMENT 59
2.3.2 SYSTEM AND USER MODE 64
3 PROGRAMMING TECHNIQUES
66
3.1 ASSEMBLER PROGRAMMING 66
3.1.1 FLOWCHART
S 66
3.1.2 ASSEMBLY LANGUAGE 68
3.1.3 PSEUDO-OPS 71
HTTP://D-NB.INFO/850497515
VII
I
3.1.
4 ABSOLUT
E AN
D RELOCATABL
E PROGRA
M BLOCK
S . . 7
5
3.1.
5 STRUCTURE
D ASSEMBLE
R PROGRAMMIN
G ...
. 7
7
3.1.
6 MACROINSTRUCTION
S AN
D CONDITIONA
L ASSEMBLIN
G 7
8
3.2 PROGRA
M FLO
W CONTRO
L 8
1
3.2.
1 UNCONDITIONA
L JUM
P . . 8
1
3.2.
2 CONDITIONA
L JUM
P AN
D SIMPL
E BRANC
H ...
. 8
2
3.2.
3 MULTIPLE-WA
Y BRANC
H 8
7
3.2.
4 PROGRA
M LOOP
S 9
1
3.
3 SUBPROGRA
M TECHNIQUE
S 9
4
3.3.
1 SUBPROGRA
M CAL
L AN
D RETUR
N 9
5
3.3.
2 PARAMETE
R PASSIN
G 9
6
3.3.
3 GLOBA
L PROGRA
M AN
D DAT
A ACCESSE
S ...
. 10
1
3.3.
4 NESTE
D SUBPROGRAM
S 10
3
4 SYSTE
M STRUCTURE
10
6
4.
1 SYSTE
M STRUCTUR
E 10
6
4.1.
1 SINGLE-CHI
P AN
D SINGLE-CAR
D SYSTEM
S ...
. 10
7
4.1.
2 BU
S ORIENTE
D MULTIPLE-CAR
D SYSTEM
S ...
. 10
7
4.1.
3 SYSTE
M BU
S 10
7
4.1.
4 MICROPROCESSO
R SIGNAL
S 10
9
4.
2 ADDRESSIN
G OF SYSTE
M COMPONENT
S 11
2
4.2.
1 ISOLATE
D AN
D MEMORY-MAPPE
D ADDRESSIN
G . . 11
2
4.2.
2 CAR
D SELECTIO
N AN
D COMPONEN
T SELECTIO
N . . 11
3
4.2.
3 WORD/BYT
E SELECTIO
N 11
6
4.2.
4 MEMOR
Y MANAGEMEN
T 11
7
4.2.
5 MEMOR
Y MANAGEMEN
T UNIT
S 11
8
4.
3 DAT
A TRANSFE
R 12
2
4.3.
1 BU
S COUPLIN
G 12
3
4.3.
2 DAT
A TRANSFE
R CONTRO
L 12
4
4.
4 INTERRUP
T SYSTEM
S 12
6
4.4.
1 INTERRUP
T PRIORIT
Y AN
D INTERRUP
T CYCL
E ...
. 12
7
4.4.
2 ALLOCATIO
N OF INTERRUP
T LEVEL
S 13
0
4.4.
3 SYSTE
M CONTRO
L SIGNAL
S 13
4
4.
5 BU
S ALLOCATIO
N 13
5
4.5.
1 LOCA
L BU
S ALLOCATIO
N 13
5
4.5.
2 GLOBA
L BU
S ALLOCATIO
N 13
7
5 INPUT/OUTPU
T ORGANIZATIO
N
13
9
5.
1 INPUT/OUTPU
T CONTRO
L WIT
H TH
E MICROPROCESSO
R ..
. 14
0
5.1.
1 SYNCHRONIZATIO
N WIT
H BUS
Y WAITIN
G ...
. 14
1
5.1.
2 SYNCHRONIZATIO
N WIT
H PROGRA
M INTERRUPTIO
N . . 14
2
5.1.
3 SYNCHRONIZATIO
N WIT
H HANDSHAKIN
G ...
. 14
2
5.1.
4 SIMULTANEOU
S HANDLIN
G O
F SEVERA
L INPUT/OUTPU
T
ACTIVITIE
S 14
4
5.
2 DAT
A TRANSMISSIO
N SYSTEM
S AN
D REMOT
E DAT
A
TRANSMISSIO
N 14
6
I
X
5.2.1 DAT
A TRANSFER TECHNIQUES 147
5.2.2 REMOT
E DAT
A TRANSMISSION 148
5.2.3 DAT
A CHECKING 151
5.3 PARALLEL DAT
A TRANSMISSION 153
5.3.1 DAT
A FORMATS 153
5.3.2 PARALLEL INTERFACE MODULE 154
5.4 ASYNCHRONOUS SERIAL DAT
A TRANSMISSION 159
5.4.1 COMMUNICATIONS PROTOCOL 160
5.4.2 DAT
A FORMATS 160
5.4.3 BIT AND CHARACTER SYNCHRONIZATION 161
5.4.4 ASYNCHRONOUS SERIAL INTERFACE MODULE . . . 161
5.5 SYNCHRONOUS SERIAL DAT
A TRANSMISSION 167
5.5.1 BIT SYNCHRONIZATION AND CHARACTE
R
SYNCHRONIZATION 168
5.5.2 COMMUNICATIONS PROTOCOLS 168
5.5.3 PROTOCOL LAYERS 172
5.5.4 SYNCHRONOUS SERIAL INTERFACE MODULE ...
. 173
6 INPUT/OUTPUT CONTROLLERS AND INPUT/OUTPUT COMPUTERS
. 176
6.1 INPUT/OUTPU
T WITH DIRECT MEMORY ACCESS . . . . 176
6.1.1 TYPES OF ACCESSES 177
6.1.2 DM
A CONTROLLER MODULE 177
6.2 INPUT/OUTPU
T COMPUTERS 184
6.2.1 MULTICOMPUTER SYSTEM WITH INPUT/OUTPU
T
COMPUTER 184
6.2.2 STRUCTURE OF THE INPUT/OUTPU
T COMPUTE
R . . . 186
6.3 CONTROLLER MODULES FOR SPECIAL FUNCTIONS ...
. 189
6.3.1 FLOPPY DISK 190
6.3.2 FLOPPY DISK CONTROLLER MODULE 191
6.3.3 VIDEO TERMINALS 194
6.3.4 CR
T CONTROLLER MODULES 197
7 16-BIT MICROPROCESSORS BY MOTOROLA, ZILOG AND INTEL
. . 199
7.1 MOTOROLA MC 68000 199
7.1.1 THE PROGRAMMING MODEL 199
7.1.2 DAT
A FORMATS 201
7.1.3 ADDRESSING MODES 201
7.1.4 INSTRUCTION FORMATS AND INSTRUCTION SET ..
. 201
7.1.5 TRA
P AND INTERRUP
T SYSTEM 205
7.1.6 PROCESSOR SIGNALS 207
7.1.7 SUCCESSORS OF THE MC6800
0 208
7.2 ZILOG Z800
0 210
7.2.1 THE PROGRAMMING MODEL 210
7.2.2 DAT
A FORMATS 212
7.2.3 ADDRESSING MODES 212
7.2.4 INSTRUCTION FORMATS AND INSTRUCTION SET . . . 213
7.2.5 TRA
P AND INTERRUPT SYSTEM 217
7.2.6 PROCESSOR SIGNALS 218
7.2.7 SUCCESSORS OF THE Z800
1 AND Z800
2 . ..
. 219
7.3 INTEL 8086 220
7.3.1 THE PROGRAMMING MODEL 221
7.3.2 DAT
A FORMATS 222
7.3.3 ADDRESSING MODES 222
7.3.4 INSTRUCTION FORMATS AND INSTRUCTION SETS . . . 223
7.3.5 TRA
P AND INTERRUP
T SYSTEM 226
7.3.6 PROCESSOR SIGNALS 227
7.3.7 SUCCESSORS OF THE 8086 229
BIBLIOGRAPHY
231
INDEX
234
|
any_adam_object | 1 |
author | Flik, Thomas 1943-2013 Liebig, Hans 1939- |
author_GND | (DE-588)108565165 (DE-588)172226147 |
author_facet | Flik, Thomas 1943-2013 Liebig, Hans 1939- |
author_role | aut aut |
author_sort | Flik, Thomas 1943-2013 |
author_variant | t f tf h l hl |
building | Verbundindex |
bvnumber | BV042321062 |
classification_rvk | ST 170 |
ctrlnum | (OCoLC)634116199 (DE-599)GBV025811908 |
discipline | Informatik |
format | Book |
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id | DE-604.BV042321062 |
illustrated | Illustrated |
indexdate | 2024-07-10T01:18:22Z |
institution | BVB |
isbn | 3540151648 0387151648 |
language | English |
lccn | 85008056 |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-027757993 |
oclc_num | 634116199 |
open_access_boolean | |
owner | DE-188 |
owner_facet | DE-188 |
physical | X, 238 S. graph. Darst. 25 cm |
publishDate | 1985 |
publishDateSearch | 1985 |
publishDateSort | 1985 |
publisher | Springer |
record_format | marc |
spelling | Flik, Thomas 1943-2013 Verfasser (DE-588)108565165 aut 16-bit-microprocessor systems structure, behavior and programming Th. Flik ; H. Liebig. Transl. by G. Bisiani Sixteen-bit microprocessor systems Berlin [u.a.] Springer 1985 X, 238 S. graph. Darst. 25 cm txt rdacontent n rdamedia nc rdacarrier Dt. Ausg. u.d.T.: Flik, Thomas: Sechzehn-Bit-Mikroprozessorsysteme. - Literaturverz. S. [231] - 233 Nebentitel: Sixteen-bit microprocessor systems Liebig, Hans 1939- Verfasser (DE-588)172226147 aut application/pdf http://d-nb.info/850497515/04 Inhaltsverzeichnis DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=027757993&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
spellingShingle | Flik, Thomas 1943-2013 Liebig, Hans 1939- 16-bit-microprocessor systems structure, behavior and programming |
title | 16-bit-microprocessor systems structure, behavior and programming |
title_alt | Sixteen-bit microprocessor systems |
title_auth | 16-bit-microprocessor systems structure, behavior and programming |
title_exact_search | 16-bit-microprocessor systems structure, behavior and programming |
title_full | 16-bit-microprocessor systems structure, behavior and programming Th. Flik ; H. Liebig. Transl. by G. Bisiani |
title_fullStr | 16-bit-microprocessor systems structure, behavior and programming Th. Flik ; H. Liebig. Transl. by G. Bisiani |
title_full_unstemmed | 16-bit-microprocessor systems structure, behavior and programming Th. Flik ; H. Liebig. Transl. by G. Bisiani |
title_short | 16-bit-microprocessor systems |
title_sort | 16 bit microprocessor systems structure behavior and programming |
title_sub | structure, behavior and programming |
url | http://d-nb.info/850497515/04 http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=027757993&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT flikthomas 16bitmicroprocessorsystemsstructurebehaviorandprogramming AT liebighans 16bitmicroprocessorsystemsstructurebehaviorandprogramming AT flikthomas sixteenbitmicroprocessorsystems AT liebighans sixteenbitmicroprocessorsystems |
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