Holdings: The power of assertions in SystemVerilog

The power of assertions in SystemVerilog:

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Bibliographic Details
Format:	Electronic eBook
Language:	English
Published:	New York Springer 2010
Subjects:	Datenverarbeitung Verilog (Computer hardware description language) Integrated circuits / Verification / Data processing Hardwareverifikation VERILOG
Online Access:	Volltext
Item Description:	Includes bibliographical references and index
Physical Description:	1 Online-Ressource (xvi, 544 p.)
ISBN:	9781441966001 9781282972582

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MARC


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Record in the Search Index

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isbn	9781441966001 9781282972582
language	English
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spelling	The power of assertions in SystemVerilog Eduard Cerny ... [et al.] New York Springer 2010 1 Online-Ressource (xvi, 544 p.) txt rdacontent c rdamedia cr rdacarrier Includes bibliographical references and index Datenverarbeitung Verilog (Computer hardware description language) Integrated circuits / Verification / Data processing Hardwareverifikation (DE-588)4214982-4 gnd rswk-swf VERILOG (DE-588)4268385-3 gnd rswk-swf Hardwareverifikation (DE-588)4214982-4 s VERILOG (DE-588)4268385-3 s 1\p DE-604 Cerny, Eduard Sonstige oth Erscheint auch als Druck-Ausgabe, Hardcover 978-1-4419-6599-8 Erscheint auch als Druck-Ausgabe, Hardcover 1-4419-6599-8 http://lib.myilibrary.com?id=297258 Aggregator Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk
spellingShingle	The power of assertions in SystemVerilog Datenverarbeitung Verilog (Computer hardware description language) Integrated circuits / Verification / Data processing Hardwareverifikation (DE-588)4214982-4 gnd VERILOG (DE-588)4268385-3 gnd
subject_GND	(DE-588)4214982-4 (DE-588)4268385-3
title	The power of assertions in SystemVerilog
title_auth	The power of assertions in SystemVerilog
title_exact_search	The power of assertions in SystemVerilog
title_full	The power of assertions in SystemVerilog Eduard Cerny ... [et al.]
title_fullStr	The power of assertions in SystemVerilog Eduard Cerny ... [et al.]
title_full_unstemmed	The power of assertions in SystemVerilog Eduard Cerny ... [et al.]
title_short	The power of assertions in SystemVerilog
title_sort	the power of assertions in systemverilog
topic	Datenverarbeitung Verilog (Computer hardware description language) Integrated circuits / Verification / Data processing Hardwareverifikation (DE-588)4214982-4 gnd VERILOG (DE-588)4268385-3 gnd
topic_facet	Datenverarbeitung Verilog (Computer hardware description language) Integrated circuits / Verification / Data processing Hardwareverifikation VERILOG
url	http://lib.myilibrary.com?id=297258
work_keys_str_mv	AT cernyeduard thepowerofassertionsinsystemverilog

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