Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor: vorgelegt von Vladimir Petrovic
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| Main Author: | |
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| Format: | Thesis Book |
| Language: | English |
| Published: |
2013
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| Subjects: | |
| Online Access: | Volltext Inhaltsverzeichnis |
| Physical Description: | 169 S. Ill., graph. Darst. |
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| 245 | 1 | 0 | |a Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor |b vorgelegt von Vladimir Petrovic |
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Record in the Search Index
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| adam_text | CONTENTS
ABSTRACT 6
ZUSAMMENFASSUNG 7
1. INTRODUCTION 8
2. TOPIC DEFINITION AND STATE-OF-THE-ART 11
2.1.IRRADIATION EFFECTS AND CIRCUIT FAULTS 11
2.2.SEU AND SET FAULT MODELS AND INJECTION TECHNIQUES 13
2.3.SEL MODEL AND CHARACTERIZATION 17
2.4. FAULT-TOLERANT CIRCUITS 20
2.5.STANDARD DESIGN FLOW 29
2.6.
OPEN ISSUES 34
3. FAULT-TOLERANT CIRCUITS FOR HIGHLY RELIABLE ASIC DESIGNS 35
3.1.LATCHUP PROTECTION CIRCUITS 35
3.1.1. SPS TYPE 1 38
3.1.2. SPS TYPE 2 42
3.2. REDUNDANT CIRCUITS WITH LATCHUP PROTECTION 45
3.2.1. TMR
CIRCUIT WITH LATCHUP PROTECTION 45
3.2.2. SELF-VOTING DMR CIRCUIT WITH LATCHUP PROTECTION 51
3.3.POWER NETWORK CONTROLLER 57
4. FAULT-TOLERANT CIRCUIT SIMULATION AND ANALYSIS 59
4.1.
FAULT INJECTION 59
4.1.1. TRANSIENT FAULT LIBRARY 61
4.1.2. UPSET FAULT LIBRARY 63
4.1.3. FAULT INJECTOR 64
4.1.4. FAULT INJECTION MECHANISM 67
4.2.TEST CIRCUITS 68
4.2.1. SET/SEU TEST CIRCUITS 68
4.2.2. SEL TEST CIRCUITS 70
4.3.SIMULATION RESULTS 73
5. MODIFIED DESIGN FLOW AND CIRCUITS IMPLEMENTATION 79
5.1. MODIFIED DESIGN FLOW 79
5.1.1. NETLIST PARSER 81
5.1.2. SPS CELL AUTOMATED PLACEMENT AND ROUTING 83
4
HTTP://D-NB.INFO/1049219732
DESIGN METHODOLOGY FOR HIGHLY RELIABLE DIGITAL ASIC DESIGNS
5.2.IMPLEMENTED TEST CIRCUITS 85
5.2.1. SPS NETWORK 85
5.2.2. SPS CELL 89
5.2.3. DMR
REDUNDANT CIRCUITS WITH LATCHUP PROTECTION 89
5.3. RESULTS AND ANALYSIS 91
5.3.1. POWER NETWORK CONTROLLER 91
5.3.2. REDUNDANT CIRCUITS ANALYSIS 91
5.3.3. SPS CELLS ANALYSIS 93
5.3.4. MEASUREMENTS 96
6. A CASE STUDY: MIDDLEWARE SWITCH PROCESSOR 106
6.1.
INTRODUCTION 106
6.2.
MIDDLEWARE SWITCH ARCHITECTURE 108
6.2.1. FUNCTIONAL DESCRIPTION 110
6.2.2. MIDDLEWARE SWITCH IMPLEMENTATION 129
6.3. FAULT-TOLERANT MIDDLEWARE SWITCH PROCESSOR 131
6.4. FAULT-TOLERANT MW SWITCH IMPLEMENTATION CHARACTERISTICS 131
7. CONCLUSION 135
APPENDIX A 137
APPENDIX B 141
APPENDIX C 147
APPENDIX D 150
APPENDIX E 152
REFERENCES 159
LIST OF ACRONYMS 165
BIBLIOGRAPHY 169
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| spelling | Petrovic, Vladimir Verfasser aut Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic 2013 169 S. Ill., graph. Darst. txt rdacontent n rdamedia nc rdacarrier Cottbus-Senftenberg, Techn. Univ., Diss., 2013 Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Kundenspezifische Schaltung (DE-588)4122250-7 gnd rswk-swf (DE-588)4113937-9 Hochschulschrift gnd-content Kundenspezifische Schaltung (DE-588)4122250-7 s Schaltungsentwurf (DE-588)4179389-4 s DE-604 Erscheint auch als Online-Ausgabe urn:nbn:de:kobv:co1-opus-29620 http://opus.kobv.de/btu/volltexte/2014/2962/ kostenfrei Volltext DNB Datenaustausch application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=027082253&sequence=000001&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis |
| spellingShingle | Petrovic, Vladimir Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| subject_GND | (DE-588)4179389-4 (DE-588)4122250-7 (DE-588)4113937-9 |
| title | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_auth | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_exact_search | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_full | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_fullStr | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_full_unstemmed | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor vorgelegt von Vladimir Petrovic |
| title_short | Design methodology for highly reliable digital ASIC designs applied to network-centric system middleware switch processor |
| title_sort | design methodology for highly reliable digital asic designs applied to network centric system middleware switch processor vorgelegt von vladimir petrovic |
| title_sub | vorgelegt von Vladimir Petrovic |
| topic | Schaltungsentwurf (DE-588)4179389-4 gnd Kundenspezifische Schaltung (DE-588)4122250-7 gnd |
| topic_facet | Schaltungsentwurf Kundenspezifische Schaltung Hochschulschrift |
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