Low-Power Variation-Tolerant Design in Nanometer Silicon:
Gespeichert in:
| Weitere Verfasser: | |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York [u.a.]
Springer
2011
|
| Online-Zugang: | Inhaltstext |
| Beschreibung: | XV, 440 S. Ill., graph. Darst. 235 mm x 155 mm |
| ISBN: | 9781441974174 |
Internformat
MARC
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| 245 | 1 | 0 | |a Low-Power Variation-Tolerant Design in Nanometer Silicon |c Swarup Bhunia ; Saibal Mukhopadhyay ed. |
| 246 | 1 | 3 | |a Low Power Variation Tolerant Design in Nanometer Silicon |
| 264 | 1 | |a New York [u.a.] |b Springer |c 2011 | |
| 300 | |a XV, 440 S. |b Ill., graph. Darst. |c 235 mm x 155 mm | ||
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Datensatz im Suchindex
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| illustrated | Illustrated |
| indexdate | 2024-08-21T00:31:51Z |
| institution | BVB |
| isbn | 9781441974174 |
| language | English |
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| spelling | Low-Power Variation-Tolerant Design in Nanometer Silicon Swarup Bhunia ; Saibal Mukhopadhyay ed. Low Power Variation Tolerant Design in Nanometer Silicon New York [u.a.] Springer 2011 XV, 440 S. Ill., graph. Darst. 235 mm x 155 mm txt rdacontent n rdamedia nc rdacarrier Bhunia, Swarup edt Erscheint auch als Online-Ausgabe 978-1-4419-7418-1 text/html http://deposit.dnb.de/cgi-bin/dokserv?id=3500875&prov=M&dok_var=1&dok_ext=htm Inhaltstext |
| spellingShingle | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| title | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| title_alt | Low Power Variation Tolerant Design in Nanometer Silicon |
| title_auth | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| title_exact_search | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| title_full | Low-Power Variation-Tolerant Design in Nanometer Silicon Swarup Bhunia ; Saibal Mukhopadhyay ed. |
| title_fullStr | Low-Power Variation-Tolerant Design in Nanometer Silicon Swarup Bhunia ; Saibal Mukhopadhyay ed. |
| title_full_unstemmed | Low-Power Variation-Tolerant Design in Nanometer Silicon Swarup Bhunia ; Saibal Mukhopadhyay ed. |
| title_short | Low-Power Variation-Tolerant Design in Nanometer Silicon |
| title_sort | low power variation tolerant design in nanometer silicon |
| url | http://deposit.dnb.de/cgi-bin/dokserv?id=3500875&prov=M&dok_var=1&dok_ext=htm |
| work_keys_str_mv | AT bhuniaswarup lowpowervariationtolerantdesigninnanometersilicon |