<p>This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the rea...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Papa, David A. (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	New York, NY [u.a.] Springer 2013
Schriftenreihe:	Lecture notes in electrical engineering 166
Schlagworte:	Ingenieurwissenschaften Engineering Electronics Systems engineering
Online-Zugang:	BTU01 FHA01 FHI01 FHN01 FHR01 FKE01 FWS01 UBY01 Volltext Inhaltsverzeichnis Abstract
Zusammenfassung:	<p>This book introduces techniques that advance the capabilities and strength of modern software tools for physical synthesis, with the ultimate goal to improve the quality of leading-edge semiconductor products.  It provides a comprehensive introduction to physical synthesis and takes the reader methodically from first principles through state-of-the-art optimizations used in cutting edge industrial tools. It explains how to integrate chip optimizations in novel ways to create powerful circuit transformations that help satisfy performance requirements.</p><p><ul><li>Broadens the scope of physical synthesis optimization to include accurate transformations operating between the global and local scales; </li><li>Integrates groups of related transformations to break circular dependencies and increase the number of circuit elements that can be jointly optimized to escape local minima;  </li><li>Derives several multi-objective optimizations from first observations through complete algorithms and experiments;</li><li>Describes integrated optimization techniques that ensure a graceful timing closure process and impact nearly every aspect of a typical physical synthesis flow.</li><p><b></p></ul><p><b></p>
Beschreibung:	<p>Part I: Introduction and Prior Art -- Timing Closure for Multi-Million-Gate Integrated Circuits -- State of the Art in Physical Synthesis -- Part II: Local Physical Synthesis and Necessary Analysis Techniques -- Buffer Insertion during Timing-Driven Placement -- Bounded Transactional Timing Analysis -- Gate Sizing During Timing-Driven Placement -- Part III: Broadening the Scope of Circuit Transformations -- Physically-Driven Logic Restructuring -- Logic Restructuring as an Aid to Physical Retiming -- Broadening the Scope of Optimization using Partitioning -- Co-Optimization of Latches and Clock Networks -- Conclusions and Future Work.</p>
Beschreibung:	1 Online-Ressource (IX, 155 p. 61 illus)
ISBN:	9781461413561
DOI:	10.1007/978-1-4614-1356-1