Statistical performance analysis and modeling techniques for nanometer VLSI designs:
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Buch |
| Sprache: | English |
| Veröffentlicht: |
New York [u.a.]
Springer
2012
|
| Schlagworte: | |
| Online-Zugang: | Inhaltsverzeichnis Klappentext |
| Beschreibung: | XXXI, 305 S. graph. Darst. |
| ISBN: | 9781461407874 |
Internformat
MARC
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| 100 | 1 | |a Shen, Ruijing |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Statistical performance analysis and modeling techniques for nanometer VLSI designs |c Ruijing Shen ; Sheldon X.-D. Tan ; Hao Yu |
| 264 | 1 | |a New York [u.a.] |b Springer |c 2012 | |
| 300 | |a XXXI, 305 S. |b graph. Darst. | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b n |2 rdamedia | ||
| 338 | |b nc |2 rdacarrier | ||
| 650 | 4 | |a Integrated circuits / Very large scale integration / Statistical methods | |
| 650 | 4 | |a Nanoelectronics / Statistical methods | |
| 650 | 4 | |a Algorithms | |
| 650 | 0 | 7 | |a Nanoelektronik |0 (DE-588)4732034-5 |2 gnd |9 rswk-swf |
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| 700 | 1 | |a Tan, Sheldon X. D. |e Verfasser |4 aut | |
| 700 | 1 | |a Yu, Hao |e Sonstige |4 oth | |
| 776 | 0 | 8 | |i Erscheint auch als |n Online-Ausgabe |z 978-1-4614-0788-1 |
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| 856 | 4 | 2 | |m Digitalisierung UB Bayreuth |q application/pdf |u http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=024813320&sequence=000004&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |3 Klappentext |
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Datensatz im Suchindex
| _version_ | 1804148928219709440 |
|---|---|
| adam_text | Contents
Part I Fundamentals
1
Introduction
................................................................. 3
1
Nanometer Chip Design in Uncertain World
........................... 3
1.1
Causes of Variations
............................................... 4
1.2
Process Variation Classification and Modeling
.................. 6
1.3
Process Variation Impacts
......................................... 8
2
Book Outline
............................................................. 8
2.1
Statistical Full-Chip Power Analysis
............................. 9
2.2
Variational On-Chip Power Delivery Network Analysis
........ 10
2.3
Statistical Interconnect Modeling and Extraction
................ 11
2.4
Statistical Analog and Yield Analysis and Optimization
........ 12
3
Summary
................................................................. 13
2
Fundamentals of Statistical Analysis
..................................... 15
1
Basic Concepts in Probability Theory
.................................. 15
1.1
Experiment, Sample Space, and Event
........................... 15
1.2
Random Variable and Expectation
................................ 16
1.3
Variance and Moments of Random Variable
..................... 17
1.4
Distribution Functions
............................................. 18
1.5
Gaussian and Log-Normal Distributions
......................... 19
1.6
Basic Concepts for Multiple Random Variables
................. 20
2
Multiple Random Variables and Variable Reduction
................... 23
2.1
Components of Covariance in Process Variation
................. 23
2.2
Random Variable Decoupling and Reduction
.................... 25
2.3
Principle Factor Analysis Technique
............................. 26
2.4
Weighted PFA Technique
......................................... 26
2.5
Principal Component Analysis Technique
....................... 27
3
Statistical Analysis Approaches
......................................... 28
3.1
Monte Carlo Method
.............................................. 28
xii
Contents
3.2
Spectral Stochastic Method Using Stochastic
Orthogonal Polynomial Chaos
.................................... 29
3.3
Collocation-Based Spectral Stochastic Method
.................. 31
3.4
Galerkin-Based Spectral Stochastic Method
..................... 33
4
Sum of Log-Normal Random Variables
................................ 33
4.1
Hermite PC Representation of Log-Normal Variables
........... 34
4.2
Hermite PC Representation with One Gaussian Variable
....... 35
4.3
Hermite PC Representation of Two and More
Gaussian Variables
................................................ 35
5
Summary
................................................................. 36
Part II Statistical Full-Chip Power Analysis
3
Traditional Statistical Leakage Power Analysis Methods
.............. 39
1
Introduction
.............................................................. 39
2
Static Leakage Modeling
................................................ 40
2.1
Gate-Based Static Leakage Model
................................ 41
2.2
MOSFET-Based Static Leakage Model
.......................... 44
3
Process Variational Models for Leakage Analysis
..................... 45
4
Full-Chip Leakage Modeling and Analysis Methods
.................. 49
4.1
Monte Carlo Method
.............................................. 49
4.2
Traditional Grid-Based Methods
.................................. 49
4.3
Projection-Based Statistical Analysis Methods
.................. 53
5
Summary
................................................................. 53
4
Statistical Leakage Power Analysis by Spectral Stochastic Method
.. 55
1
Introduction
.............................................................. 55
2
Flow of Gate-Based Method
............................................ 56
2.1
Random Variables Transformation and Reduction
............... 57
2.2
Computation of Full-Chip Leakage Currents
.................... 58
2.3
Time Complexity Analysis
........................................ 60
3
Numerical Examples
..................................................... 60
4
Summary
................................................................. 63
5
Linear Statistical Leakage Analysis by Virtual Grid-Based Modeling
65
1
Introduction
.............................................................. 65
2
Virtual Grid-Based Spatial Correlation Model
......................... 67
3
Linear Chip-Level Leakage Power Analysis Method
.................. 69
3.1
Computing Gate Leakage by the Spectral Stochastic Method
.. 70
3.2
Computation of Full-Chip Leakage Currents
.................... 71
3.3
Time Complexity Analysis
........................................ 71
4
New Statistical Leakage Characterization in SCL
..................... 72
4.1
Acceleration by Look-Up Table Approach
....................... 72
4.2
Enhanced Algorithm
.............................................. 73
4.3
Computation of Full-Chip Leakage Currents
.................... 75
Contents xiii
4.4
Incremental
Leakage Analysis
.................................... 76
4.5
Time Complexity Analysis
........................................ 77
4.6
Discussion of Extension to Statistical Runtime
Leakage Estimation
................................................ 77
4.7
Discussion about Runtime Leakage Reduction Technique
...... 79
5
Numerical Examples
..................................................... 79
5.1
Accuracy and CPU Time
.......................................... 80
5.2
Incremental Analysis
.............................................. 82
6
Summary
................................................................. 82
6
Statistical Dynamic Power Estimation Techniques
..................... 83
1
Introduction
.............................................................. 83
2
PriorWorks
.............................................................. 85
2.1
Existing Relevant Works
.......................................... 85
2.2
Segment-Based Power Estimation Method
....................... 86
3
The Presented New Statistical Dynamic Power Estimation Method
.. 87
3.1
Flow of the Presented Analysis Method
.......................... 87
3.2
Acceleration by Building the Look-Up Table
.................... 88
3.3
Statistical Gate Power with Glitch Width Variation
............. 89
3.4
Computation of Full-Chip Dynamic Power
...................... 89
4
Numerical Examples
..................................................... 90
5
Summary
................................................................. 92
7
Statistical Total Power Estimation Techniques
.......................... 93
1
Introduction
.............................................................. 93
2
Review of the Monte Carlo-Based Power Estimation Method
........ 95
3
The Statistical Total Power Estimation Method
........................ 96
3.1
Flow of the Presented Analysis Method Under Fixed
Input Vector
........................................................ 97
3.2
Computing Total Power by Orthogonal Polynomials
............ 97
3.3
Flow of the Presented Analysis Method Under
Random Input Vectors
............................................. 98
4
Numerical Examples
..................................................... 99
5
Summary
................................................................. 103
Part III Variational On-Chip Power Delivery Network
Analysis
8
Statistical Power Grid Analysis Considering Log-Normal
Leakage Current Variations
............................................... 107
1 Introduction
.............................................................. 107
2
Previous Works
.......................................................... 108
3
Nominal Power Grid Network Model
.................................. 109
4
Problem Formulation
....................................................
Ill
xiv Contents
5
Statistical
Power
Grid Analysis Based on Hermite PC
................ 112
5.1
Galerkin-Based Spectral Stochastic Method
..................... 112
5.2
Spatial Correlation in Statistical Power Grid Analysis
.......... 114
5.3
Variations in Wires and Leakage Currents
....................... 115
6
Numerical Examples
..................................................... 117
6.1
Comparison with Taylor Expansion Method
..................... 118
6.2
Examples Without Spatial Correlation
........................... 119
6.3
Examples with Spatial Correlation
............................... 122
6.4
Consideration of Variations in Both Wire and Currents
......... 123
7
Summary
................................................................. 126
9
Statistical Power Grid Analysis by Stochastic Extended
Krylov Subspace Method
.................................................. 127
1
Introduction
.............................................................. 127
2
Problem Formulation
.................................................... 128
3
Review of Extended Krylov Subspace Method
........................ 128
4
The Stochastic Extended Krylov Subspace Method
—
StoEKS
........ 130
4.1
StoEKS Algorithm Flowchart
..................................... 130
4.2
Generation of the Augmented Circuit Matrices
.................. 130
4.3
Computation of Hermite PCs of Current Moments
with Log-Normal Distribution
.................................... 133
4.4
The StoEKS Algorithm
........................................... 135
4.5
A Walk-Through Example
........................................ 136
4.6
Computational Complexity Analysis
............................. 137
5
Numerical Examples
..................................................... 138
6
Summary
................................................................. 143
10
Statistical Power Grid Analysis by Variational Subspace Method
__ 145
1
Introduction
.............................................................. 145
2
Review of Fast Truncated Balanced Realization Methods
.............
1
46
2.1
Standard Truncated Balanced Realization Methods
............. 146
2.2
Fast and Approximate
TBR
Methods
............................. 147
2.3
Statistical Reduction by Variational
TBR
........................ 148
3
The Presented Variational Analysis Method: varETBR
............... 148
3.1
Extended Truncated Balanced Realization Scheme
.............. 148
3.2
The Presented Variational ETBR Method
........................ 150
4
Numerical Examples
..................................................... 152
5
Summary
................................................................. 158
Part IV Statistical Interconnect Modeling and Extractions
11
Statistical Capacitance Modeling and Extraction
.......................
1
63
1
Introduction
.............................................................. 163
2
Problem Formulation
.................................................... 165
3
Presented Orthogonal PC-Based Extraction Method: StatCap
........ 166
3.1
Capacitance Extraction Using Galerkin-Based Method
......... 166
Contents xv
3.2 Expansion
of
Potential
Coefficient
Matrix....................... 167
3.3
Formulation of the Augmented System
.......................... 170
4
Second-Order StatCap
................................................... 171
4.1
Derivation of Analytic Second-Order Potential
Coefficient Matrix
................................................. 172
4.2
Formulation of the Augmented System
.......................... 173
5
Numerical Examples
..................................................... 174
6
Additional Notes
......................................................... 177
7
Summary
................................................................. 182
12
Incremental Extraction of Variational Capacitance
.................... 183
1
Introduction
.............................................................. 183
2
Review of GRMES and FMM Algorithms
............................. 184
2.1
The GMRES Method
.............................................. 184
2.2
The Fast Multipole Method
....................................... 184
3
Stochastic Geometrical Moment
........................................ 185
3.1
Geometrical Moment
.............................................. 186
3.2
Orthogonal PC Expansion
........................................ 188
4
Parallel Fast Multipole Method with SGM
............................. 189
4.1
Upward Pass
....................................................... 190
4.2
Downward Pass
.................................................... 191
4.3
Data Sharing and Communication
................................ 191
5
Incremental GMRES
.................................................... 193
5.1
Deflated Power Iteration
.......................................... 194
5.2
Incremental Precondition
.......................................... 194
6
piCAP Algorithm
........................................................ 196
6.1
Extraction Flow
.................................................... 196
6.2
Implementation Optimization
..................................... 198
7
Numerical Examples
..................................................... 199
7.1
Accuracy Validation
............................................... 199
7.2
Speed Validation
................................................... 202
7.3
Eigenvalue Analysis
............................................... 205
8
Summary
................................................................. 207
13
Statistical Inductance Modeling and Extraction
........................ 209
1
Introduction
.............................................................. 209
2
Problem Formulation
.................................................... 210
3
The Presented Statistical Inductance Extraction Method
—
statHenry
. 212
3.1
Variable Decoupling and Reduction
.............................. 212
3.2
Variable Reduction by Weighted PFA
............................ 213
3.3
Flow of statHenry Technique
..................................... 214
4
Numerical Examples
..................................................... 214
5
Summary
................................................................. 218
xvi Contents
Part V Statistical
Analog
and Yield Analysis
and Optimization Techniques
14
Performance Bound Analysis of Variational Linearized
Analog Circuits
............................................................. 221
1
Introduction
.............................................................. 221
2
Review of Interval Arithmetic and
Affine
Arithmetic
................. 222
3
The Performance Bound Analysis Method Based
on Graph-based Symbolic Analysis
.................................... 223
3.1
Variational Transfer Function Computation
...................... 223
3.2
Performance Bound by Kharitonov s Functions
................. 228
4
Numerical Examples
..................................................... 230
5
Summary
................................................................. 233
15
Stochastic Analog Mismatch Analysis
.................................... 235
1
Introduction
.............................................................. 235
2
Preliminary
............................................................... 237
2.1
Review of Mismatch Model
....................................... 237
2.2
Nonlinear Model Order Reduction
............................... 237
3
Stochastic Transient Mismatch Analysis
............................... 239
3.1
Stochastic Mismatch Current Model
............................. 239
3.2
Perturbation Analysis
.............................................. 240
3.3
Non-Monte Carlo Analysis by Spectral Stochastic Method
..... 240
3.4
A CMOS Transistor Example
..................................... 242
4
Macromodeling for Mismatch Analysis
................................ 242
4.1
Incremental Trajectory-Piecewise-Linear Modeling
............. 243
4.2
Stochastic Extension for Mismatch Analysis
.................... 246
5
Numerical Examples
..................................................... 247
5.1
Comparison of Mismatch Waveform-Error and Runtime
....... 248
5.2
Comparison of TPWL
Macromodel
.............................. 251
6
Summary
................................................................. 252
16
Statistical Yield Analysis and Optimization
............................. 253
1
Introduction
.............................................................. 253
2
Problem Formulations
................................................... 254
3
Stochastic Variation Analysis for Yield Analysis
...................... 256
3.1
Algorithm Overview
............................................... 258
3.2
Stochastic Yield Estimation and Optimization
................... 259
3.3
Fast Yield Calculation
............................................. 259
3.4
Stochastic Sensitivity Analysis
................................... 260
3.5
Multiobjective Optimization
...................................... 262
4
Numerical Examples
..................................................... 265
4.1
NMC Mismatch for Yield Analysis
.............................. 266
4.2
Stochastic Yield Estimation
....................................... 266
4.3
Stochastic Sensitivity Analysis
................................... 268
4.4
Stochastic Yield Optimization
.................................... 270
5
Summary
................................................................. 272
Contents xvii
17
Voltage
Binning Technique for Yield Optimization
..................... 273
1
Introduction
.............................................................. 273
2
Problem Formulation
.................................................... 274
2.1
Yield Estimation
................................................... 274
2.2
Voltage Binning Problem
......................................... 275
3
The Presented Voltage Binning Method
................................ 276
3.1
Voltage Binning Considering Valid Segment
.................... 277
3.2
Bin Number Prediction Under Given Yield Requirement
....... 278
3.3
Yield Analysis and Optimization
................................. 280
4
Numerical Examples
..................................................... 281
4.1
Setting of Process Variation
....................................... 282
4.2
Prediction of Bin Numbers Under Yield Requirement
.......... 282
4.3
Comparison Between Uniform and Optimal Voltage
Binning Schemes
.................................................. 283
4.4
Sensitivity to Frequency and Power Constraints
................. 284
4.5
CPU Times
......................................................... 284
5
Summary
................................................................. 285
References
......................................................................... 287
Index
............................................................................... 299
Ruijing Shen
·
Sheldon
X.-D.
Tan
·
Нао
Yu
Statistical Performance Analysis and Modeling Techniques for
Nanometer VLSI Designs
Since process variation and chip performance uncertainties have become more
pronounced as technologies scale down into the nanometer regime, accurate and
efficient modeling or characterization of variations from the device to the architecture
level have become imperative for the successful design of VLSI chips.
This book provides readers with tools for variation-aware design methodologies and
computer-aided design (CAD) of VLSI systems, in the presence of process variations at
the nanometer scale. It presents the latest developments for modeling and analysis, with
a focus on statistical interconnect modeling, statistical parasitic extractions, statistical
full-chip leakage and dynamic power analysis considering spatial correlations, statistical
analysis and modeling tor large global interconnects and analog/mixed-signal circuits.
•
Provides readers with timely, systematic and comprehensive treatments of statistical
modeling and analysis of VLSI systems with a focus on interconnects, on-chip
power grids and clock networks, and analog/mixed-signal circuits;
•
Helps chip designers understand the potential and limitations of their design tools,
improving their design productivity:
•
Presents analysis of each algorithm with practical applications in the context of real
circuit design;
•
Includes numerical examples for the quantitative analysis and evaluation of
algorithms presented.
Electrical Engineering
ISBN
978-1-4614-0787-4
►
springer.com
|
| any_adam_object | 1 |
| author | Shen, Ruijing Tan, Sheldon X. D. |
| author_facet | Shen, Ruijing Tan, Sheldon X. D. |
| author_role | aut aut |
| author_sort | Shen, Ruijing |
| author_variant | r s rs s x d t sxd sxdt |
| building | Verbundindex |
| bvnumber | BV039955474 |
| classification_rvk | ZN 4950 |
| ctrlnum | (OCoLC)785849826 (DE-599)BVBBV039955474 |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Book |
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| id | DE-604.BV039955474 |
| illustrated | Illustrated |
| indexdate | 2024-07-10T00:14:55Z |
| institution | BVB |
| isbn | 9781461407874 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-024813320 |
| oclc_num | 785849826 |
| open_access_boolean | |
| owner | DE-703 |
| owner_facet | DE-703 |
| physical | XXXI, 305 S. graph. Darst. |
| publishDate | 2012 |
| publishDateSearch | 2012 |
| publishDateSort | 2012 |
| publisher | Springer |
| record_format | marc |
| spelling | Shen, Ruijing Verfasser aut Statistical performance analysis and modeling techniques for nanometer VLSI designs Ruijing Shen ; Sheldon X.-D. Tan ; Hao Yu New York [u.a.] Springer 2012 XXXI, 305 S. graph. Darst. txt rdacontent n rdamedia nc rdacarrier Integrated circuits / Very large scale integration / Statistical methods Nanoelectronics / Statistical methods Algorithms Nanoelektronik (DE-588)4732034-5 gnd rswk-swf Statistik (DE-588)4056995-0 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Nanoelektronik (DE-588)4732034-5 s Statistik (DE-588)4056995-0 s DE-604 VLSI (DE-588)4117388-0 s Tan, Sheldon X. D. Verfasser aut Yu, Hao Sonstige oth Erscheint auch als Online-Ausgabe 978-1-4614-0788-1 Digitalisierung UB Bayreuth application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=024813320&sequence=000003&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA Inhaltsverzeichnis Digitalisierung UB Bayreuth application/pdf http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=024813320&sequence=000004&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA Klappentext |
| spellingShingle | Shen, Ruijing Tan, Sheldon X. D. Statistical performance analysis and modeling techniques for nanometer VLSI designs Integrated circuits / Very large scale integration / Statistical methods Nanoelectronics / Statistical methods Algorithms Nanoelektronik (DE-588)4732034-5 gnd Statistik (DE-588)4056995-0 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4732034-5 (DE-588)4056995-0 (DE-588)4117388-0 |
| title | Statistical performance analysis and modeling techniques for nanometer VLSI designs |
| title_auth | Statistical performance analysis and modeling techniques for nanometer VLSI designs |
| title_exact_search | Statistical performance analysis and modeling techniques for nanometer VLSI designs |
| title_full | Statistical performance analysis and modeling techniques for nanometer VLSI designs Ruijing Shen ; Sheldon X.-D. Tan ; Hao Yu |
| title_fullStr | Statistical performance analysis and modeling techniques for nanometer VLSI designs Ruijing Shen ; Sheldon X.-D. Tan ; Hao Yu |
| title_full_unstemmed | Statistical performance analysis and modeling techniques for nanometer VLSI designs Ruijing Shen ; Sheldon X.-D. Tan ; Hao Yu |
| title_short | Statistical performance analysis and modeling techniques for nanometer VLSI designs |
| title_sort | statistical performance analysis and modeling techniques for nanometer vlsi designs |
| topic | Integrated circuits / Very large scale integration / Statistical methods Nanoelectronics / Statistical methods Algorithms Nanoelektronik (DE-588)4732034-5 gnd Statistik (DE-588)4056995-0 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Integrated circuits / Very large scale integration / Statistical methods Nanoelectronics / Statistical methods Algorithms Nanoelektronik Statistik VLSI |
| url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=024813320&sequence=000003&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=024813320&sequence=000004&line_number=0002&func_code=DB_RECORDS&service_type=MEDIA |
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